From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from rtits2.realtek.com.tw (rtits2.realtek.com [211.75.126.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0B1CD3E314A; Wed, 6 May 2026 08:14:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.75.126.72 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778055250; cv=none; b=VPEZJvyUGQ5FOnGJYaK5Bk63XAJXv0CPlf+/S4CW7uMAxhD50b7N5mohj8BE3cKC3w6DyDzM6knBKGIjToLR7W5DgmbsYQgqsyHvAG6GvGyA5cPY0CtQyZPWAu23PU7YFSXzJGhr3j+Z6X8pyoTOPFlQtRDyjzPWaHLgiO/CKhc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778055250; c=relaxed/simple; bh=abe0cYAsS28S/09SWhJ9xSqVoyt+naPJV6NAjqJW+ek=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Vg04kr0f+aDUmtZf8D+nlJhKRt7y3eTEHUz/BuYykNk+aqPF71n6py269nDEO+3Jdlo8l+RjQMxtELyIOPg55ocM2a0rybDdEGo5tnl/VyJeeMrO0OWP1OozT1bgTofh4mXCjbgWA3YBoh/Vk37feL9FIYyFL7p/UIJEEjrMTfU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realsil.com.cn; spf=pass smtp.mailfrom=realsil.com.cn; dkim=pass (2048-bit key) header.d=realsil.com.cn header.i=@realsil.com.cn header.b=Q50JEjKi; arc=none smtp.client-ip=211.75.126.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realsil.com.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=realsil.com.cn Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=realsil.com.cn header.i=@realsil.com.cn header.b="Q50JEjKi" X-SpamFilter-By: ArmorX SpamTrap 5.80 with qID 6468DUnrC1854043, This message is accepted by code: ctloc85258 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=realsil.com.cn; s=dkim; t=1778055210; bh=epi82dfyb3QxHqFvOrGhnB+YLTkegHohYaK1Xpqhj2U=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Transfer-Encoding:Content-Type; b=Q50JEjKi7Z9mDThE5EZ+/BzwEHuPdia809qK+LDhLAlaVECwzEhhP4VgefFfuwUtO ngfWWZ8/V8y3vfTFsdYDRafcsNr3JUHoN5dd6AaTn07PDNWGp8qy0rshJepLQ2NJ1q VrUAlJ5Qw+WFyJp4CD1dalGBGXfGVgs5iLQKo8LrwejhCP4CXkTnyx/GIHxCbGFpK8 ILXhQ8xLDREEdCaSHKmU2UmBu6zRXCFy0LP2/ODmNVvXDTTy/euPUvUEIxMBqF+ZpI ZF5vfOSmuIFluBSvjrrCHHnHPNyJPG6RgqscvKVIRtI66n5Dnkz1AD1EppqTGMFQMi 0lXto+tDe/cBQ== Received: from RS-EX-MBS2.realsil.com.cn ([172.29.17.102]) by rtits2.realtek.com.tw (8.15.2/3.27/5.94) with ESMTPS id 6468DUnrC1854043 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 6 May 2026 16:13:30 +0800 Received: from RS-EX-MBS2.realsil.com.cn (172.29.17.102) by RS-EX-MBS2.realsil.com.cn (172.29.17.102) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Wed, 6 May 2026 16:13:29 +0800 Received: from 172.29.37.154 (172.29.37.152) by RS-EX-MBS2.realsil.com.cn (172.29.17.102) with Microsoft SMTP Server id 15.2.2562.17 via Frontend Transport; Wed, 6 May 2026 16:13:29 +0800 From: javen To: , , , , , , , CC: , , Javen Xu Subject: [Patch net-next v1 4/7] r8169: enable new interrupt mapping Date: Wed, 6 May 2026 16:13:22 +0800 Message-ID: <20260506081326.767-5-javen_xu@realsil.com.cn> X-Mailer: git-send-email 2.50.1.windows.1 In-Reply-To: <20260506081326.767-1-javen_xu@realsil.com.cn> References: <20260506081326.767-1-javen_xu@realsil.com.cn> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain From: Javen Xu This patch enables new interrupt mapping for RTL8127. Signed-off-by: Javen Xu --- drivers/net/ethernet/realtek/r8169_main.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c index 671f82c326d9..69601e077646 100644 --- a/drivers/net/ethernet/realtek/r8169_main.c +++ b/drivers/net/ethernet/realtek/r8169_main.c @@ -4004,6 +4004,15 @@ DECLARE_RTL_COND(rtl_mac_ocp_e00e_cond) return r8168_mac_ocp_read(tp, 0xe00e) & BIT(13); } +static void rtl8125_hw_set_interrupt_type(struct rtl8169_private *tp) +{ + u8 tmp; + + tmp = RTL_R8(tp, INT_CFG0_8125); + tmp |= INT_CFG0_ENABLE_8125; + RTL_W8(tp, INT_CFG0_8125, tmp); +} + static void rtl_hw_start_8125_common(struct rtl8169_private *tp) { rtl_pcie_state_l2l3_disable(tp); @@ -4012,6 +4021,9 @@ static void rtl_hw_start_8125_common(struct rtl8169_private *tp) RTL_W32(tp, RSS_CTRL_8125, 0); RTL_W16(tp, Q_NUM_CTRL_8125, 0); + if (tp->features & RTL_VEC_MAP_ENABLE) + rtl8125_hw_set_interrupt_type(tp); + /* disable UPS */ r8168_mac_ocp_modify(tp, 0xd40a, 0x0010, 0x0000); -- 2.43.0