[PATCH net-next 14/15] net: enetc: refactor MR interrupt enable/disable helpers

[Wei Fang <wei.fang@nxp.com>]

The MR interrupt helpers currently operate on struct enetc_hw and rely
on the fixed ENETC_PSIIER_MR_MASK constant when enabling or disabling
MR-related interrupt sources. As part of upcoming support for ENETC v4
with more or less VFs, the mask used for MR interrupts will need to be
generated dynamically based on the number of enabled VFs, rather than
relying on a global constant.

Consolidate enetc_msg_enable_mr_int() and enetc_msg_disable_mr_int()
into a single function. The unified helper takes struct enetc_pf *pf
and a bool enable parameter, replacing the previous struct enetc_hw *hw
argument. This change allows future code to access pf->num_vfs and
dynamically derive the interrupt mask.

This is a preparatory refactoring with no functional changes. The
implementation still uses the fixed ENETC_PSIIER_MR_MASK constant. A
subsequent patch will implement dynamic mask generation based on the
actual VF count.

Signed-off-by: Wei Fang <wei.fang@nxp.com>
---
 .../net/ethernet/freescale/enetc/enetc_msg.c  | 26 +++++++++----------
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/drivers/net/ethernet/freescale/enetc/enetc_msg.c b/drivers/net/ethernet/freescale/enetc/enetc_msg.c
index f3e78865617e..73e32c9b65a8 100644
--- a/drivers/net/ethernet/freescale/enetc/enetc_msg.c
+++ b/drivers/net/ethernet/freescale/enetc/enetc_msg.c
@@ -3,18 +3,18 @@
 
 #include "enetc_pf_common.h"
 
-static void enetc_msg_disable_mr_int(struct enetc_hw *hw)
+static void enetc_msg_set_mr_int(struct enetc_pf *pf, bool enable)
 {
-	u32 psiier = enetc_rd(hw, ENETC_PSIIER);
-	/* disable MR int source(s) */
-	enetc_wr(hw, ENETC_PSIIER, psiier & ~ENETC_PSIIER_MR_MASK);
-}
+	struct enetc_hw *hw = &pf->si->hw;
+	u32 val;
 
-static void enetc_msg_enable_mr_int(struct enetc_hw *hw)
-{
-	u32 psiier = enetc_rd(hw, ENETC_PSIIER);
+	val = enetc_rd(hw, ENETC_PSIIER);
+	if (enable)
+		val |= ENETC_PSIIER_MR_MASK;
+	else
+		val &= ~ENETC_PSIIER_MR_MASK;
 
-	enetc_wr(hw, ENETC_PSIIER, psiier | ENETC_PSIIER_MR_MASK);
+	enetc_wr(hw, ENETC_PSIIER, val);
 }
 
 static irqreturn_t enetc_msg_psi_msix(int irq, void *data)
@@ -22,7 +22,7 @@ static irqreturn_t enetc_msg_psi_msix(int irq, void *data)
 	struct enetc_si *si = (struct enetc_si *)data;
 	struct enetc_pf *pf = enetc_si_priv(si);
 
-	enetc_msg_disable_mr_int(&si->hw);
+	enetc_msg_set_mr_int(pf, false);
 	schedule_work(&pf->msg_task);
 
 	return IRQ_HANDLED;
@@ -171,7 +171,7 @@ static void enetc_msg_task(struct work_struct *work)
 		if (!mr_mask) {
 			/* re-arm MR interrupts, w1c the IDR reg */
 			enetc_wr(hw, ENETC_PSIIDR, ENETC_PSIIER_MR_MASK);
-			enetc_msg_enable_mr_int(hw);
+			enetc_msg_set_mr_int(pf, true);
 			return;
 		}
 
@@ -264,7 +264,7 @@ static int enetc_msg_psi_init(struct enetc_pf *pf)
 	}
 
 	/* enable MR interrupts */
-	enetc_msg_enable_mr_int(&si->hw);
+	enetc_msg_set_mr_int(pf, true);
 
 	return 0;
 
@@ -285,7 +285,7 @@ static void enetc_msg_psi_free(struct enetc_pf *pf)
 	cancel_work_sync(&pf->msg_task);
 
 	/* disable MR interrupts */
-	enetc_msg_disable_mr_int(&si->hw);
+	enetc_msg_set_mr_int(pf, false);
 
 	for (i = 0; i < pf->num_vfs; i++)
 		enetc_msg_free_mbx(si, i);
-- 
2.34.1