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Thu, 14 May 2026 01:55:12 -0500 From: Anurag Dutta To: , , , , , , , , , , CC: , , Subject: [PATCH] can: m_can: Implement workaround for errata i2278 and i2279 Date: Thu, 14 May 2026 12:25:11 +0530 Message-ID: <20260514065511.3573223-1-a-dutta@ti.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF000023D4:EE_|BY5PR10MB4244:EE_ X-MS-Office365-Filtering-Correlation-Id: 0435a51d-b09f-40d2-8024-08deb185c358 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|36860700016|1800799024|82310400026|376014|921020|18002099003|56012099003; X-Microsoft-Antispam-Message-Info: Zom4gR0bBvp+xlt5mDQ8ke5Gq+YZeuoUqw1106NOlMdqSTJvwq8IwuEGkWfSeTWl5c9/YlzzziiKGT23IqV0ulVhfEWpE8TVsSkj2CGReU51EWS5Losy2jED6P5ELKil+8S0LELgim1gP4m2RqzLgzxtUl9RXXTF2kpx94i6EtKU/oNAwlhEluzeDwDqlUniQq4GL7IpDuhC+l/ngh/1SCSJjzfODSWz3Wa+g+tppIVmw3ub53AtKuiDAl9qIhkwIMEDaf4fIrWhvAsrZLGARc9aBoB7/dArFF4IrJRE7qaeoa7NJdwjjyXP7E52EzIheMnER7Nh4F3EqGuFHAW85WN13+TPdz5E9Lkq/cYjAmegLFT9BYQDhSUth6MdDJkRnEuuaouCC3DCJ/AZvTyU/wQxIPg5VYBgAqWsY8Qo0crgBF+P6TqiH/ynRnRQNkXhbsZcFt2q6rjd2mzj+6mKRRm4hO0nl+7Ge3b/9cncHTl+oifGFe55pN57JBAJQY6S+yjiTsk36HKIOaoX6ZUx+8yD6W4CyRGpbt+mRgFWpB/LdBHWM1t3gpjqnJc5/qwSjdclJ4WQ87+t+/ZC5w5FG3+qyebWIuJIRZeh627f9k1IgMG2yYAu8fzri17EbbPeUcVkmEqWBMpaQW84kY3YvU5rxJAXUUuj5lgroMS56WpEHMdQUmiRxO72+VjIIwgV+TpnVIYxJkFijVOYvgOK9ASRoxbzmkhAAYKiNdJ54udlFC/vT4ul5asRd/n0T5Q1THP6ucs0BD2d1sZVsCyvNjCLOptMcR+8I+VbGhlkNRw= X-Forefront-Antispam-Report: CIP:198.47.21.194;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:flwvzet200.ext.ti.com;PTR:ErrorRetry;CAT:NONE;SFS:(13230040)(7416014)(36860700016)(1800799024)(82310400026)(376014)(921020)(18002099003)(56012099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: mxcoOdZ2wbiLDwtkH0gRh0p02MDMDCteBcywPu1P4LWRX1Hj0smah5evwDzHb5SOqwdk482gq088sZd+j9QPA4XVdSpuQ6Okqk6Ko1wTEzZy+OZim6VQFwKzw8Uyn3yhL54pkwGeWf7/1PtuckypAL0b7MSPPdGJ/3r0hFfsT81bl+R7k/1Jj3wjv1GKIZmQ6Xm5JyfAfvqmkQwRxaq8g6P2f0GzH6YNxXb9Emr23X5hVZ4s+KkMCNt5bm5VnmTt423yRZjaqVWON9kR0D6sMnlKjwu//3DSlwW5hiP8X7ohSYIcEqdp4+5Ku5wn6PC8P2gW64XAQjCxn8l17aIEfGtdBxF6zSF8T+B1sXKej9wutGREzo7Glzm9z/Zq3J1hYyJl35+Bz7E64pr1BXE9Cq5nNAyJzaqWMBPywCT2UjLMXW25br7M85UxLIB0CLaN X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 May 2026 06:55:19.8030 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0435a51d-b09f-40d2-8024-08deb185c358 X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7;Ip=[198.47.21.194];Helo=[flwvzet200.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000023D4.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR10MB4244 Message transmit order is not guaranteed when dedicated TX buffers configured with the same Message ID are submitted simultaneously via TXBAR write. This is described in J7 errata i2278 and i2279. As a workaround, introduce m_can_tx_peripheral_submit() to submit buffers one at a time using ffs() to find the next pending buffer. The TX complete interrupt(IR_TC) triggers submission of the next buffer, ensuring strict FIFO ordering. Link: https://www.ti.com/lit/pdf/sprz530 Signed-off-by: Anurag Dutta --- drivers/net/can/m_can/m_can.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c index c2b1da87a9ee..1eb6397b79b9 100644 --- a/drivers/net/can/m_can/m_can.c +++ b/drivers/net/can/m_can/m_can.c @@ -1225,6 +1225,17 @@ static void m_can_coalescing_update(struct m_can_classdev *cdev, u32 ir) HRTIMER_MODE_REL); } +static void m_can_tx_peripheral_submit(struct m_can_classdev *cdev) +{ + int ffs_idx; + + ffs_idx = ffs(cdev->tx_peripheral_submit); + if (ffs_idx > 0) { + m_can_write(cdev, M_CAN_TXBAR, ffs_idx - 1); + cdev->tx_peripheral_submit &= cdev->tx_peripheral_submit - 1; + } +} + /* This interrupt handler is called either from the interrupt thread or a * hrtimer. This has implications like cancelling a timer won't be possible * blocking. @@ -1290,6 +1301,11 @@ static int m_can_interrupt_handler(struct m_can_classdev *cdev) m_can_finish_tx(cdev, 1, frame_len); } } else { + if (cdev->is_peripheral && (ir & IR_TC)) { + if (cdev->tx_peripheral_submit > 0) + m_can_tx_peripheral_submit(cdev); + } + if (ir & (IR_TEFN | IR_TEFW)) { /* New TX FIFO Element arrived */ ret = m_can_echo_tx_event(dev); @@ -1956,8 +1972,7 @@ static void m_can_tx_submit(struct m_can_classdev *cdev) if (!cdev->is_peripheral) return; - m_can_write(cdev, M_CAN_TXBAR, cdev->tx_peripheral_submit); - cdev->tx_peripheral_submit = 0; + m_can_tx_peripheral_submit(cdev); } static void m_can_tx_work_queue(struct work_struct *ws) -- 2.34.1