From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-qv1-f49.google.com (mail-qv1-f49.google.com [209.85.219.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8929C2701CB for ; Sat, 16 May 2026 03:47:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.219.49 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778903251; cv=none; b=MORAREpVbpwfgWLxLao2S3niJ8rUvWXvLslOCcSw4v6pLToT2178RKk+AGZP7XiJ+CcLMmtdLf6gmj70QQp/22KIW91rOeQGuBgfdOrkv4WNS5b7zOeHsebU3ZsAL92HKvgzjYklvbdQJWWjaNI9qU4a+cU6n1HUS78liPIZNWM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778903251; c=relaxed/simple; bh=5mXi0QnLwvtmOOBRk6jeJvpBCQ/2EDrdaUjT2QhRi2A=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=X/8uIPykKWooVljseibQ0cFzkaTVvVBRY3G/vDPOUkqzItFGuxHS3LMaIg7NM0LBItHV7+FlGGSWIua/ZVmcV7rxlqon4XWFwwYLtdBqOLz/A48qPydM4LduVtZ+Dy9LT0dq9tNQetTLvDwWYkRaW/00O0e0gKjmdPVghZFOE1E= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=AMVMPivi; arc=none smtp.client-ip=209.85.219.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="AMVMPivi" Received: by mail-qv1-f49.google.com with SMTP id 6a1803df08f44-8b7105dfb35so8720066d6.3 for ; Fri, 15 May 2026 20:47:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778903248; x=1779508048; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=DX9fAWgItNtEquVYu0mvpftc3qnM9bDW8Gg0bvb8u9M=; b=AMVMPivi6YvfU3BbK6rvYkOu3Lxb1bJ4tiSRuYImkA/ESrzCTCqVUJHVldpGNMx7TT Om39ExifO4YNeqYAqP73y+/d+vNRUW4+802yHb3ZkMtStxt1ak1g80KrB716hSYUuyUc 7JpnK8jLUuG4pLLjMPto7rVlerdfkOtj4UlxgT3mlQ0hr56ylCCebz0pKnuVW2MN4+vd 4Ej+pS+bykYY/v4XqWiv71wWM7ueaTG5BPyVelaueYJO/04hLOPlLnebmSHUM3vtxqDx gr4OmlCuX+H4Uh5V7GpKc/0uqbNcB1BtDfki7sAZ5WdD0Rvz9Ky3WoQmsc+M9osiObLu MyNg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778903248; x=1779508048; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=DX9fAWgItNtEquVYu0mvpftc3qnM9bDW8Gg0bvb8u9M=; b=lT01jaBK5HLLPTApG9AqurMzJ/nQpPSotce9+vz39rjyTWt9/jDk67JwLkP1JtXPZz F3ScYTaeQCc/iaYXDK3DABInnnn2jKrfYVgxwe9b04GD5KhAwwIgvj9q0V7Uw9MGSgvf 2iuuofy18vXt7bXhupBIc/ilpx2E6JTOnNjDenWlupfb+plXLCeq06+S41kO6B9hcJLI ICec1IZVNfi9ySFD2ILxDlR9TqnlVSU/LSDmhlGbkzCW5oj0C9yDcws+oa3j5lzXEweQ tbrM430rzPXpksQQJ6zyrQ95VwujCW97yZ11zEyp5FfYjEOUg7a6FQSxlisahyhe8Ytz ZHrA== X-Gm-Message-State: AOJu0YzRGQa/C6fWzEPcv933ZcuNeHmjar1KqcFEnC+ugWuPruC2yXZK gx+p6n03QfIgAVkorCuXCmPpBevpfDjObCzQgU6qGtOi6QfsFMyGCo8D X-Gm-Gg: Acq92OE1tTBObAgSjznxXspPFRrWpnjMimmM27XtVMcEp284rwpeqsxSDDfLyYR8Ooi FwI3j/BFeqsiTTZzd8bw9ff2kAYqoWjcSvLm552zN+dCvQiUnsuidUxe0myulbm1ve4XUzgfaGw wds94JekVwFr7rkcvXyiGEQ1M0UCpSuab0qHnX77fApX+21QJhRylHcHN/XU3g7FuLd2c4m91yD ZwSlxMWmQB3a1NVMgjKWN7bxHBTCX53AaHZ1e1X2t24Ev1m2TpKYfRdTIMkcwjs4cfcxIPbal9G 0nl6f9fGIT+xG4V6VqEAetsYwE1SnnDNkTnK6TJl4p0jKck6h1vSdhvB/9jdm6tdNrXdph8++Pi +rRmHG4doTnYuIGi1VQfTkmxlPYYRj2vooKm6NLeH3XY1CuxnhqHRrfD+WIH1KMy1XIzUsx9iB0 C86mWR4Z0mFkjYkLg99g5dNotvc3NM3LsJuO8OoIXIVCcQMlFjOg== X-Received: by 2002:a05:6214:4ec3:b0:8ca:f1c:6493 with SMTP id 6a1803df08f44-8ca0f631cb4mr109134476d6.1.1778903248471; Fri, 15 May 2026 20:47:28 -0700 (PDT) Received: from tresc054937.tre-sc.gov.br ([187.65.210.13]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-8c908d1d2e7sm70874546d6.16.2026.05.15.20.47.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 May 2026 20:47:27 -0700 (PDT) From: Luiz Angelo Daros de Luca Date: Sat, 16 May 2026 00:46:20 -0300 Subject: [net-next PATCH v4 4/8] net: dsa: realtek: rtl8365mb: add table lookup interface Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-Id: <20260516-realtek_forward-v4-4-8b6d6a1eefdc@gmail.com> References: <20260516-realtek_forward-v4-0-8b6d6a1eefdc@gmail.com> In-Reply-To: <20260516-realtek_forward-v4-0-8b6d6a1eefdc@gmail.com> To: Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Simon Horman , Linus Walleij , =?utf-8?q?Alvin_=C5=A0ipraga?= , Yury Norov , Rasmus Villemoes , Russell King Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Luiz Angelo Daros de Luca X-Mailer: b4 0.15.2 From: Alvin Šipraga Add a generic table lookup interface to centralize access to the RTL8365MB internal tables. This interface abstracts the low-level table access logic and will be used by subsequent commits to implement FDB and VLAN operations. Co-developed-by: Alvin Šipraga Signed-off-by: Alvin Šipraga Reviewed-by: Linus Walleij Signed-off-by: Luiz Angelo Daros de Luca --- drivers/net/dsa/realtek/Makefile | 1 + drivers/net/dsa/realtek/rtl8365mb_table.c | 216 ++++++++++++++++++++++++++++++ drivers/net/dsa/realtek/rtl8365mb_table.h | 132 ++++++++++++++++++ 3 files changed, 349 insertions(+) diff --git a/drivers/net/dsa/realtek/Makefile b/drivers/net/dsa/realtek/Makefile index 3f986e04912f..99654c4c5a3d 100644 --- a/drivers/net/dsa/realtek/Makefile +++ b/drivers/net/dsa/realtek/Makefile @@ -17,3 +17,4 @@ rtl8366-objs += rtl8366rb-leds.o endif obj-$(CONFIG_NET_DSA_REALTEK_RTL8365MB) += rtl8365mb.o rtl8365mb-objs := rtl8365mb_main.o \ + rtl8365mb_table.o \ diff --git a/drivers/net/dsa/realtek/rtl8365mb_table.c b/drivers/net/dsa/realtek/rtl8365mb_table.c new file mode 100644 index 000000000000..01ce5e159b1c --- /dev/null +++ b/drivers/net/dsa/realtek/rtl8365mb_table.c @@ -0,0 +1,216 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Look-up table query interface for the rtl8365mb switch family + * + * Copyright (C) 2022 Alvin Šipraga + */ + +#include "rtl8365mb_table.h" +#include + +/* Table access control register */ +#define RTL8365MB_TABLE_CTRL_REG 0x0500 +/* Should be one of rtl8365mb_table enum members */ +#define RTL8365MB_TABLE_CTRL_TABLE_MASK GENMASK(2, 0) +/* Should be one of rtl8365mb_table_op enum members */ +#define RTL8365MB_TABLE_CTRL_OP_MASK GENMASK(3, 3) +/* Should be one of rtl8365mb_table_l2_method enum members */ +#define RTL8365MB_TABLE_CTRL_METHOD_MASK GENMASK(7, 4) +/* NOTE: PORT_MASK is only 4 bit, which suggests that port-based + * look-up of the L2 table only works for physical port addresses + * 0~4. It could be that the Realtek driver is out-of-date and + * actually the mask is something like 0xFF00, but this is + * unconfirmed. + */ +#define RTL8365MB_TABLE_CTRL_PORT_MASK GENMASK(11, 8) + +/* Table access address register */ +#define RTL8365MB_TABLE_ACCESS_ADDR_REG 0x0501 +#define RTL8365MB_TABLE_ADDR_MASK GENMASK(13, 0) + +/* Table status register */ +#define RTL8365MB_TABLE_STATUS_REG 0x0502 +#define RTL8365MB_TABLE_STATUS_ADDRESS_MASK GENMASK(10, 0) +/* set for L3, unset for L2 */ +#define RTL8365MB_TABLE_STATUS_ADDR_TYPE_MASK GENMASK(11, 11) +#define RTL8365MB_TABLE_STATUS_HIT_STATUS_MASK GENMASK(12, 12) +#define RTL8365MB_TABLE_STATUS_BUSY_FLAG_MASK GENMASK(13, 13) +#define RTL8365MB_TABLE_STATUS_ADDRESS_EXT_MASK GENMASK(14, 14) + +/* Table read/write registers */ +#define RTL8365MB_TABLE_WRITE_BASE 0x0510 +#define RTL8365MB_TABLE_WRITE_REG(_x) \ + (RTL8365MB_TABLE_WRITE_BASE + (_x)) +#define RTL8365MB_TABLE_READ_BASE 0x0520 +#define RTL8365MB_TABLE_READ_REG(_x) \ + (RTL8365MB_TABLE_READ_BASE + (_x)) +#define RTL8365MB_TABLE_ENTRY_MAX_SIZE 10 +#define RTL8365MB_TABLE_10TH_DATA_MASK GENMASK(3, 0) +#define RTL8365MB_TABLE_WRITE_10TH_REG \ + RTL8365MB_TABLE_WRITE_REG(RTL8365MB_TABLE_ENTRY_MAX_SIZE - 1) + +static int rtl8365mb_table_poll_busy(struct realtek_priv *priv) +{ + u32 val; + + return regmap_read_poll_timeout(priv->map_nolock, + RTL8365MB_TABLE_STATUS_REG, val, + !FIELD_GET(RTL8365MB_TABLE_STATUS_BUSY_FLAG_MASK, val), + 10, 100); +} + +int rtl8365mb_table_query(struct realtek_priv *priv, + enum rtl8365mb_table table, + enum rtl8365mb_table_op op, u16 *addr, + enum rtl8365mb_table_l2_method method, + u16 port, u16 *data, size_t size) +{ + bool addr_as_input = true; + bool write_data = false; + int ret = 0; + u32 cmd; + u32 val; + u32 hit; + + /* Prepare target table and operation (read or write) */ + cmd = 0; + cmd |= FIELD_PREP(RTL8365MB_TABLE_CTRL_TABLE_MASK, table); + cmd |= FIELD_PREP(RTL8365MB_TABLE_CTRL_OP_MASK, op); + if (op == RTL8365MB_TABLE_OP_READ && table == RTL8365MB_TABLE_L2) { + cmd |= FIELD_PREP(RTL8365MB_TABLE_CTRL_METHOD_MASK, method); + switch (method) { + case RTL8365MB_TABLE_L2_METHOD_MAC: + /* + * Method MAC requires as input the same L2 table format + * you'll get as result. However, it might only use mac + * address and FID/VID fields. + */ + write_data = true; + + /* METHOD_MAC does not use addr as input, but may return + * the matched index. + */ + addr_as_input = false; + + break; + case RTL8365MB_TABLE_L2_METHOD_ADDR: + case RTL8365MB_TABLE_L2_METHOD_ADDR_NEXT: + case RTL8365MB_TABLE_L2_METHOD_ADDR_NEXT_UC: + case RTL8365MB_TABLE_L2_METHOD_ADDR_NEXT_MC: + break; + case RTL8365MB_TABLE_L2_METHOD_ADDR_NEXT_UC_PORT: + cmd |= FIELD_PREP(RTL8365MB_TABLE_CTRL_PORT_MASK, port); + break; + default: + return -EINVAL; + } + } else if (op == RTL8365MB_TABLE_OP_WRITE) { + write_data = true; + + /* Writing to L2 does not use addr as input, as the table index + * is derived from key fields. + */ + if (table == RTL8365MB_TABLE_L2) + addr_as_input = false; + } + + /* To prevent concurrent access to the look-up tables, take the regmap + * lock manually and access via the map_nolock regmap. + */ + mutex_lock(&priv->map_lock); + + /* Write entry data if writing to the table (or L2_METHOD_MAC) */ + if (write_data) { + /* bulk write data up to 9th word */ + ret = regmap_bulk_write(priv->map_nolock, + RTL8365MB_TABLE_WRITE_BASE, + data, + min_t(size_t, size, + RTL8365MB_TABLE_ENTRY_MAX_SIZE - + 1)); + if (ret) + goto out; + + /* 10th register uses only 4 least significant bits */ + if (size == RTL8365MB_TABLE_ENTRY_MAX_SIZE) { + val = FIELD_PREP(RTL8365MB_TABLE_10TH_DATA_MASK, + data[size - 1]); + ret = regmap_update_bits(priv->map_nolock, + RTL8365MB_TABLE_WRITE_10TH_REG, + RTL8365MB_TABLE_10TH_DATA_MASK, + val); + } + + if (ret) + goto out; + } + + /* Write address (if needed) */ + if (addr_as_input) { + ret = regmap_write(priv->map_nolock, + RTL8365MB_TABLE_ACCESS_ADDR_REG, + FIELD_PREP(RTL8365MB_TABLE_ADDR_MASK, + *addr)); + if (ret) + goto out; + } + + /* Execute */ + ret = regmap_write(priv->map_nolock, RTL8365MB_TABLE_CTRL_REG, cmd); + if (ret) + goto out; + + /* Poll for completion */ + ret = rtl8365mb_table_poll_busy(priv); + if (ret) + goto out; + + /* For both reads and writes to the L2 table, check status */ + if (table == RTL8365MB_TABLE_L2) { + ret = regmap_read(priv->map_nolock, RTL8365MB_TABLE_STATUS_REG, + &val); + if (ret) + goto out; + + /* Did the query find an entry? */ + hit = FIELD_GET(RTL8365MB_TABLE_STATUS_HIT_STATUS_MASK, val); + if (!hit) { + ret = -ENOENT; + goto out; + } + + /* If so, extract the address */ + *addr = 0; + *addr |= FIELD_GET(RTL8365MB_TABLE_STATUS_ADDRESS_MASK, val); + *addr |= FIELD_GET(RTL8365MB_TABLE_STATUS_ADDRESS_EXT_MASK, val) + << 11; + /* only set if it is a L3 address */ + *addr |= FIELD_GET(RTL8365MB_TABLE_STATUS_ADDR_TYPE_MASK, val) + << 12; + } + + /* Finally, get the table entry if we were reading */ + if (op == RTL8365MB_TABLE_OP_READ) { + ret = regmap_bulk_read(priv->map_nolock, + RTL8365MB_TABLE_READ_BASE, + data, size); + if (ret) + goto out; + + /* For the biggest table entries, the uppermost table + * entry register has space for only one nibble. Mask + * out the remainder bits. Empirically I saw nothing + * wrong with omitting this mask, but it may prevent + * unwanted behaviour. FYI. + */ + if (size == RTL8365MB_TABLE_ENTRY_MAX_SIZE) { + val = FIELD_GET(RTL8365MB_TABLE_10TH_DATA_MASK, + data[size - 1]); + data[size - 1] = val; + } + } + +out: + mutex_unlock(&priv->map_lock); + + return ret; +} diff --git a/drivers/net/dsa/realtek/rtl8365mb_table.h b/drivers/net/dsa/realtek/rtl8365mb_table.h new file mode 100644 index 000000000000..8df8ba9ce0fe --- /dev/null +++ b/drivers/net/dsa/realtek/rtl8365mb_table.h @@ -0,0 +1,132 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Look-up table query interface for the rtl8365mb switch family + * + * Copyright (C) 2022 Alvin Šipraga + */ + +#ifndef _REALTEK_RTL8365MB_TABLE_H +#define _REALTEK_RTL8365MB_TABLE_H + +#include +#include + +#include "realtek.h" + +/** + * enum rtl8365mb_table - available switch tables + * @RTL8365MB_TABLE_ACL_RULE: ACL rules + * @RTL8365MB_TABLE_ACL_ACTION: ACL actions + * @RTL8365MB_TABLE_CVLAN: VLAN4k configurations + * @RTL8365MB_TABLE_L2: filtering database (2K hash table) + * @RTL8365MB_TABLE_IGMP_GROUP: IGMP group database (readonly) + * + * NOTE: Don't change the enum values. They must concur with the field + * described by @RTL8365MB_TABLE_CTRL_TABLE_MASK. + */ +enum rtl8365mb_table { + RTL8365MB_TABLE_ACL_RULE = 1, + RTL8365MB_TABLE_ACL_ACTION = 2, + RTL8365MB_TABLE_CVLAN = 3, + RTL8365MB_TABLE_L2 = 4, + RTL8365MB_TABLE_IGMP_GROUP = 5, +}; + +/** + * enum rtl8365mb_table_op - table query operation + * @RTL8365MB_TABLE_OP_READ: read an entry from the target table + * @RTL8365MB_TABLE_OP_WRITE: write an entry to the target table + * + * NOTE: Don't change the enum values. They must concur with the field + * described by @RTL8365MB_TABLE_CTRL_OP_MASK. + */ +enum rtl8365mb_table_op { + RTL8365MB_TABLE_OP_READ = 0, + RTL8365MB_TABLE_OP_WRITE = 1, +}; + +/** + * enum rtl8365mb_table_l2_method - look-up method for read queries of L2 table + * @RTL8365MB_TABLE_L2_METHOD_MAC: look-up by source MAC address and FID (or + * VID) + * @RTL8365MB_TABLE_L2_METHOD_ADDR: look-up by entry address + * @RTL8365MB_TABLE_L2_METHOD_ADDR_NEXT: look-up next entry starting from the + * supplied address + * @RTL8365MB_TABLE_L2_METHOD_ADDR_NEXT_UC: same as ADDR_NEXT but search only + * unicast addresses + * @RTL8365MB_TABLE_L2_METHOD_ADDR_NEXT_MC: same as ADDR_NEXT but search only + * multicast addresses + * @RTL8365MB_TABLE_L2_METHOD_ADDR_NEXT_UC_PORT: same as ADDR_NEXT_UC but + * search only entries with matching source port + * + * NOTE: Don't change the enum values. They must concur with the field + * described by @RTL8365MB_TABLE_CTRL_METHOD_MASK + */ +enum rtl8365mb_table_l2_method { + RTL8365MB_TABLE_L2_METHOD_MAC = 0, + RTL8365MB_TABLE_L2_METHOD_ADDR = 1, + RTL8365MB_TABLE_L2_METHOD_ADDR_NEXT = 2, + RTL8365MB_TABLE_L2_METHOD_ADDR_NEXT_UC = 3, + RTL8365MB_TABLE_L2_METHOD_ADDR_NEXT_MC = 4, + /* + * RTL8365MB_TABLE_L2_METHOD_ADDR_NEXT_MC_L3 = 5, + * RTL8365MB_TABLE_L2_METHOD_ADDR_NEXT_MC_L2L3 = 6, + */ + RTL8365MB_TABLE_L2_METHOD_ADDR_NEXT_UC_PORT = 7, +}; + +/** + * rtl8365mb_table_query() - read from or write to a switch table + * @priv: driver context + * @table: target table, see &enum rtl8365mb_table + * @op: read or write operation, see &enum rtl8365mb_table_op + * @addr: table address. For indexed tables, this selects the entry to access. + * For L2 read queries, it is ignored as input for MAC-based lookup + * methods and used as input for address-based lookup methods. On + * successful L2 queries, it is updated with the matched entry address. + * @method: L2 table lookup method, see &enum rtl8365mb_table_l2_method. + * Ignored for non-L2 tables. + * @port: for L2 read queries using method + * %RTL8365MB_TABLE_L2_METHOD_ADDR_NEXT_UC_PORT, restrict the search + * to entries associated with this source port. Ignored otherwise. + * @data: data buffer used to read from or write to the table. For L2 MAC + * lookups, this buffer provides the lookup key and receives the + * matched entry contents on success. + * @size: size of @data in 16-bit words. The caller must ensure that @size + * matches the target table's entry size and does not exceed + * RTL8365MB_TABLE_ENTRY_MAX_SIZE. + * + * This function provides unified access to the internal tables of the switch. + * All tables except the L2 table are simple indexed tables, where @addr + * selects the entry and @op determines whether the access is a read or a + * write operation. + * + * The L2 table is a hash table and supports multiple lookup methods. For + * %RTL8365MB_TABLE_L2_METHOD_MAC, an entry is searched based on the MAC + * address and FID/VID fields provided in @data, using the same format as + * an L2 table entry. Address-based methods either read a specific entry + * (%RTL8365MB_TABLE_L2_METHOD_ADDR) or iterate over valid entries starting + * from @addr (%RTL8365MB_TABLE_L2_METHOD_ADDR_NEXT and variants). When using + * %RTL8365MB_TABLE_L2_METHOD_ADDR_NEXT_UC_PORT, only entries associated with + * the specified @port are considered. + * + * On successful L2 lookups, @addr is updated with the matched table address + * and @data contains the corresponding table entry. If no matching entry + * is found, -ENOENT is returned. + * + * The contents of @data are used as input when writing to tables or when + * specifying the lookup key for L2 MAC searches, and as output for all + * successful read operations. If an error occurs, the contents of @addr + * and @data are undefined. + * + * @size must match the size of the target table entry, expressed in 16-bit + * words. + * + * Return: 0 on success, or a negative error code on failure. + */ +int rtl8365mb_table_query(struct realtek_priv *priv, + enum rtl8365mb_table table, + enum rtl8365mb_table_op op, u16 *addr, + enum rtl8365mb_table_l2_method method, + u16 port, u16 *data, size_t size); + +#endif /* _REALTEK_RTL8365MB_TABLE_H */ -- 2.54.0