Re: [QUESTION] mlx5: format_select_dw_8_6_ext capability on ConnectX-7

[Leon Romanovsky <leon@kernel.org>]

On Tue, May 19, 2026 at 01:44:22AM +0900, Max Makarov wrote:
> Hi,
> 
> Question about the cmd_hca_cap_2.format_select_dw_8_6_ext bit (introduced
> into mlx5_ifc.h in v6.12-rc1).
> 
> On all three of our standalone ConnectX-7 SKUs (PSIDs MT_0000000838,
> MT_0000000840, MT_0000000892, firmware 28.48.1000) this bit reads as 0 in
> both GET_CUR and GET_MAX modes. The DPDK code at
> drivers/net/mlx5/hws/mlx5dr_cmd.c reads it without any device-ID
> conditional, so it appears to be exclusively firmware-controlled — yet
> firmware reports 0 across all our CX-7 cards, including the latest
> public release.
> 
> This blocks DOCA Flow CT pipe for IPv6 (which requires the 11-DW jumbo
> STE format gated by this bit).
> 
> Two questions:
> 
>   1. Is the kernel's filter that rejects SET_HCA_CAP for cap_class != 
>      MLX5_CAP_GENERAL intentional? If so, what's the rationale?
> 
>   2. From the NVIDIA side: is this capability hardware-fused on standalone
>      CX-7 (BlueField-3 advertises it as 1), or could a future firmware
>      release enable it on CX-7?

Please contact your NVIDIA support representative.

Thanks

> 
> Thanks,
> Max Makarov
> Volta Cloud
>