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Wed, 20 May 2026 12:20:49 -0700 (PDT) Received: from alir-mac.sitimecorp.com ([12.1.37.172]) by smtp.gmail.com with ESMTPSA id 00721157ae682-7cc9d18dcddsm56346757b3.49.2026.05.20.12.20.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 20 May 2026 12:20:48 -0700 (PDT) From: Ali Rouhi X-Google-Original-From: Ali Rouhi To: jiri@resnulli.us Cc: vadim.fedorenko@linux.dev, arkadiusz.kubalewski@intel.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, cjubran@nvidia.com, Oleg.Zadorozhnyi@devoxsoftware.com, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Ali Rouhi Subject: [PATCH v2 net-next 0/3] dpll: add SiTime SiT9531x DPLL clock driver Date: Wed, 20 May 2026 12:19:40 -0700 Message-Id: <20260520191943.73938-1-arouhi@sitime.com> X-Mailer: git-send-email 2.39.2 (Apple Git-143) Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This series adds a DPLL subsystem driver for the SiTime SiT95316 and SiT95317 programmable clock generators, along with the associated device tree bindings. This driver has been through multiple rounds of off-list review with Jiri Pirko and Carolina Jubran. v1: https://lore.kernel.org/netdev/20260511211143.19792-1-arouhi@sitime.com/ Changes in v2: - Patch 2/3 (DT bindings): - Remove Linux-specific runtime description paragraph (Conor) - Simplify reset-gpios, interrupts descriptions to hardware behavior (Conor) - Add allOf: $ref: /schemas/dpll/dpll-device.yaml#, switch to unevaluatedProperties (Conor) - Add pin sub-nodes in example 2 (Conor) - Rename node clock-generator@68 to dpll@68 to match dpll-device.yaml (Sashiko) - Add clocks/clock-names properties for xtal reference clock - Patch 3/3 (driver): - Fix SiT95316 num_inputs: 8 -> 4 (Carolina) - Initialize xtal_freq at probe via devm_clk_get_optional_enabled - Move DPLL/kworker init before IRQ registration to prevent NULL deref - Clear notification latches in periodic worker to prevent IRQ tight loop - Use clkout_map[] in output_phase_adjust_set() for correct register addressing Ali Rouhi (3): dt-bindings: vendor-prefixes: add SiTime Corporation dt-bindings: dpll: add SiTime SiT9531x clock generator dpll: add SiTime SiT9531x DPLL clock driver .../bindings/dpll/sitime,sit9531x.yaml | 145 + .../devicetree/bindings/vendor-prefixes.yaml | 2 + MAINTAINERS | 6 + drivers/dpll/Kconfig | 1 + drivers/dpll/Makefile | 1 + drivers/dpll/sit9531x/Kconfig | 17 + drivers/dpll/sit9531x/Makefile | 4 + drivers/dpll/sit9531x/core.c | 2636 +++++++++++++++++ drivers/dpll/sit9531x/core.h | 282 ++ drivers/dpll/sit9531x/dpll.c | 1147 +++++++ drivers/dpll/sit9531x/dpll.h | 90 + drivers/dpll/sit9531x/prop.c | 345 +++ drivers/dpll/sit9531x/prop.h | 39 + drivers/dpll/sit9531x/regs.h | 359 +++ 14 files changed, 5074 insertions(+) create mode 100644 Documentation/devicetree/bindings/dpll/sitime,sit9531x.yaml create mode 100644 drivers/dpll/sit9531x/Kconfig create mode 100644 drivers/dpll/sit9531x/Makefile create mode 100644 drivers/dpll/sit9531x/core.c create mode 100644 drivers/dpll/sit9531x/core.h create mode 100644 drivers/dpll/sit9531x/dpll.c create mode 100644 drivers/dpll/sit9531x/dpll.h create mode 100644 drivers/dpll/sit9531x/prop.c create mode 100644 drivers/dpll/sit9531x/prop.h create mode 100644 drivers/dpll/sit9531x/regs.h -- 2.43.0