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Thu, 21 May 2026 04:11:43 -0700 From: Tariq Toukan To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , "Simon Horman" , Adithya Jayachandran , Jiri Pirko , Moshe Shemesh , Or Har-Toov , Shay Drori , Parav Pandit , Daniel Jurgens , Kees Cook , Cosmin Ratiu , Carolina Jubran , , , , Gal Pressman Subject: [PATCH net-next 05/12] net/mlx5: Support SPF SFs in SF hardware table Date: Thu, 21 May 2026 14:08:36 +0300 Message-ID: <20260521110843.367329-6-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20260521110843.367329-1-tariqt@nvidia.com> References: <20260521110843.367329-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00022573:EE_|DS0PR12MB6533:EE_ X-MS-Office365-Filtering-Correlation-Id: 5da1ea2f-9648-47d4-3a28-08deb729cb30 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|36860700016|82310400026|1800799024|22082099003|56012099003|18002099003|11063799006|6133799003; X-Microsoft-Antispam-Message-Info: XplOwkMheiPZIkrpCswLnRM6/qEJnNdEHWx/eRaWvbaKq5+hvjfgrisV2fcn6EbvT0/G8QpJBSGcROTHN2st8DYZa7wHZUsA5IlBpnxE6qsRpCkqtTcSvrsbZOmvVUDdb8qjXA09GfvIruESIxCoNl7SDoqXRQgmvZKVOJKvZyjkLiZRgcjYQ1JnWkYYLbp52h3qnQn8HqUGyaIX2HqLHbRdl84pPDcBy7ZIcG95yRtpILfkgruVNU4d2g3H7U11VkM59YKAoTnirgN09wug5nkQqA7UqZbaT0zt38Id1sFJ432KKRaPE63vER0xCr43VYNVO9sGSKkhLLnkspUnmEw8QNpfMxIRuLElhywgrNTWaWkcoJJKFls5k4Ks370YIIHSWIh2NqW3wV1b9hGs1EahSyob9Ttpprwtl9rls4MaTFEnwc8Zw7wXJSiDWiCM8GjlAZV7DfvyRbsIUS+yYg/RFg91hDvgC/V2isC10CYGpjnDsvuasgjAgWevHRa0gnOFUkk8OCyCJtIYvQ1Cl9Efrm5L8opE5cpF127CLSrwW9/82HUlhebfj/ew/ZIrURTLxvMX84PPbMMlUQiTPYiZPuID3lqPzGjGP6if8qG0LwVm7nOND4S0zwNoYEBWDbF8z4Ntu4GGrT3UM9qjcS4fDLBnZhQQlNGcNP4xTmHmzU9n3cCA+NDucry+p7ywUhImFBcCK9Q3J+fg+/nD/2Lac/ciwQnIsYDYsEJx1Co= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(7416014)(36860700016)(82310400026)(1800799024)(22082099003)(56012099003)(18002099003)(11063799006)(6133799003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: JpmT8fuV8psZT0HPPE2WlDGvkbd3S+wicc+bzZFaAhVq7MY/wEwWydaFfwNifeCpVGkbqzsYZIfkNT94OGsO0WqRuIQcp5dNVcnzXajbC+lo0ElkqWpDh42wpx7WQk6KnJ47r4IJ4Klt6+Bjy98d6QtiYz4JBBGoApxf3JEfQWG4O1zmNRYqNakluQP/4sPx+GrZFEuHhZ6AT3KrObRsvJygZiCbXKGViqkQisJp2JbugGiLXgyI0AfInn04j1Bd1R39xh2M2rj0pvxAM4a3+afB1Ln5QAI/vl0gEp6suvdO/HveO+KLgWofWnU/C6oiiKTlxTcpd/CgC4XDzZBaKLKGY3j4murCAH+oc0+qrGzS+8nS7YAR5vWmRXVmv7MdjKD4M4t4rdD/XjNyV2tlsksgEq2vi4sMOqT46PAPg0Vt+gcNvBtbYOR85nJAzgrh X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 May 2026 11:12:06.1724 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5da1ea2f-9648-47d4-3a28-08deb729cb30 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00022573.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB6533 From: Moshe Shemesh Convert the SF hardware table from a fixed-size hwc array to a dynamically allocated one, supporting satellite PF (SPF) SFs alongside local and external host SFs. Initialize hwc entries for each SPF using its host_number as controller. Rename MLX5_SF_HWC_EXTERNAL to MLX5_SF_HWC_EXT_HOST and add MLX5_SF_HWC_FIRST_SPF for clarity. Signed-off-by: Moshe Shemesh Signed-off-by: Tariq Toukan --- .../ethernet/mellanox/mlx5/core/sf/hw_table.c | 89 ++++++++++++++----- 1 file changed, 69 insertions(+), 20 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/sf/hw_table.c b/drivers/net/ethernet/mellanox/mlx5/core/sf/hw_table.c index 049dfd431618..0bc9146a3598 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/sf/hw_table.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/sf/hw_table.c @@ -21,25 +21,33 @@ struct mlx5_sf_hwc_table { struct mlx5_sf_hw *sfs; int max_fn; u16 start_fn_id; + u32 controller; }; -enum mlx5_sf_hwc_index { +enum { MLX5_SF_HWC_LOCAL, - MLX5_SF_HWC_EXTERNAL, - MLX5_SF_HWC_MAX, + MLX5_SF_HWC_EXT_HOST, + MLX5_SF_HWC_FIRST_SPF, }; struct mlx5_sf_hw_table { struct mutex table_lock; /* Serializes sf deletion and vhca state change handler. */ - struct mlx5_sf_hwc_table hwc[MLX5_SF_HWC_MAX]; + struct mlx5_sf_hwc_table *hwc; + int num_hwc; }; static struct mlx5_sf_hwc_table * mlx5_sf_controller_to_hwc(struct mlx5_core_dev *dev, u32 controller) { - int idx = !!controller; + struct mlx5_sf_hw_table *table = dev->priv.sf_hw_table; + int i; + + for (i = MLX5_SF_HWC_FIRST_SPF; i < table->num_hwc; i++) { + if (table->hwc[i].controller == controller) + return &table->hwc[i]; + } - return &dev->priv.sf_hw_table->hwc[idx]; + return &table->hwc[!!controller]; } u16 mlx5_sf_sw_to_hw_id(struct mlx5_core_dev *dev, u32 controller, u16 sw_id) @@ -60,7 +68,7 @@ mlx5_sf_table_fn_to_hwc(struct mlx5_sf_hw_table *table, u16 fn_id) { int i; - for (i = 0; i < ARRAY_SIZE(table->hwc); i++) { + for (i = 0; i < table->num_hwc; i++) { if (table->hwc[i].max_fn && fn_id >= table->hwc[i].start_fn_id && fn_id < (table->hwc[i].start_fn_id + table->hwc[i].max_fn)) @@ -221,9 +229,10 @@ static void mlx5_sf_hw_table_hwc_dealloc_all(struct mlx5_core_dev *dev, static void mlx5_sf_hw_table_dealloc_all(struct mlx5_core_dev *dev, struct mlx5_sf_hw_table *table) { - mlx5_sf_hw_table_hwc_dealloc_all(dev, - &table->hwc[MLX5_SF_HWC_EXTERNAL]); - mlx5_sf_hw_table_hwc_dealloc_all(dev, &table->hwc[MLX5_SF_HWC_LOCAL]); + int i; + + for (i = 0; i < table->num_hwc; i++) + mlx5_sf_hw_table_hwc_dealloc_all(dev, &table->hwc[i]); } static int mlx5_sf_hw_table_hwc_init(struct mlx5_sf_hwc_table *hwc, u16 max_fn, u16 base_id) @@ -277,11 +286,13 @@ static int mlx5_sf_hw_table_res_register(struct mlx5_core_dev *dev, u16 max_fn, int mlx5_sf_hw_table_init(struct mlx5_core_dev *dev) { struct mlx5_sf_hw_table *table; + int num_spfs, num_hwc; u16 max_ext_fn = 0; u16 ext_base_id = 0; u16 base_id; u16 max_fn; int err; + int i; if (!mlx5_vhca_event_supported(dev)) return 0; @@ -295,7 +306,7 @@ int mlx5_sf_hw_table_init(struct mlx5_core_dev *dev) if (mlx5_sf_hw_table_res_register(dev, max_fn, max_ext_fn)) mlx5_core_dbg(dev, "failed to register max SFs resources"); - if (!max_fn && !max_ext_fn) + if (!max_fn && !max_ext_fn && !mlx5_esw_has_spf_sfs(dev)) return 0; table = kzalloc_obj(*table); @@ -304,26 +315,62 @@ int mlx5_sf_hw_table_init(struct mlx5_core_dev *dev) goto alloc_err; } + num_spfs = mlx5_esw_get_num_spfs(dev); + num_hwc = MLX5_SF_HWC_FIRST_SPF + num_spfs; + table->hwc = kcalloc(num_hwc, sizeof(*table->hwc), GFP_KERNEL); + if (!table->hwc) { + err = -ENOMEM; + goto hwc_alloc_err; + } + table->num_hwc = num_hwc; + mutex_init(&table->table_lock); dev->priv.sf_hw_table = table; + table->hwc[MLX5_SF_HWC_LOCAL].controller = 0; base_id = mlx5_sf_start_function_id(dev); err = mlx5_sf_hw_table_hwc_init(&table->hwc[MLX5_SF_HWC_LOCAL], max_fn, base_id); if (err) - goto table_err; + goto hwc_init_err; - err = mlx5_sf_hw_table_hwc_init(&table->hwc[MLX5_SF_HWC_EXTERNAL], + table->hwc[MLX5_SF_HWC_EXT_HOST].controller = + mlx5_esw_get_hpf_host_number(dev) + 1; + err = mlx5_sf_hw_table_hwc_init(&table->hwc[MLX5_SF_HWC_EXT_HOST], max_ext_fn, ext_base_id); if (err) - goto ext_err; + goto hwc_init_err; + + for (i = 0; i < num_spfs; i++) { + u16 spf_max_sfs, spf_base_id, host_number; + int hwc_idx = MLX5_SF_HWC_FIRST_SPF + i; + + err = mlx5_esw_spf_get_host_number(dev, i, &host_number); + if (err) + goto hwc_init_err; + + err = mlx5_esw_sf_max_spf_functions(dev, i, &spf_max_sfs, + &spf_base_id); + if (err) + goto hwc_init_err; - mlx5_core_dbg(dev, "SF HW table: max sfs = %d, ext sfs = %d\n", max_fn, max_ext_fn); + table->hwc[hwc_idx].controller = host_number + 1; + err = mlx5_sf_hw_table_hwc_init(&table->hwc[hwc_idx], + spf_max_sfs, spf_base_id); + if (err) + goto hwc_init_err; + } + + mlx5_core_dbg(dev, "SF HW table: max sfs = %d, ext sfs = %d, num spfs = %d\n", + max_fn, max_ext_fn, num_spfs); return 0; -ext_err: - mlx5_sf_hw_table_hwc_cleanup(&table->hwc[MLX5_SF_HWC_LOCAL]); -table_err: +hwc_init_err: + dev->priv.sf_hw_table = NULL; + for (i = 0; i < num_hwc; i++) + mlx5_sf_hw_table_hwc_cleanup(&table->hwc[i]); mutex_destroy(&table->table_lock); + kfree(table->hwc); +hwc_alloc_err: kfree(table); alloc_err: mlx5_sf_hw_table_res_unregister(dev); @@ -333,13 +380,15 @@ int mlx5_sf_hw_table_init(struct mlx5_core_dev *dev) void mlx5_sf_hw_table_cleanup(struct mlx5_core_dev *dev) { struct mlx5_sf_hw_table *table = dev->priv.sf_hw_table; + int i; if (!table) goto res_unregister; - mlx5_sf_hw_table_hwc_cleanup(&table->hwc[MLX5_SF_HWC_EXTERNAL]); - mlx5_sf_hw_table_hwc_cleanup(&table->hwc[MLX5_SF_HWC_LOCAL]); + for (i = 0; i < table->num_hwc; i++) + mlx5_sf_hw_table_hwc_cleanup(&table->hwc[i]); mutex_destroy(&table->table_lock); + kfree(table->hwc); kfree(table); dev->priv.sf_hw_table = NULL; res_unregister: -- 2.44.0