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Thu, 4 Jun 2026 04:46:30 -0700 From: Tariq Toukan To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , Shay Drory , Or Har-Toov , Edward Srouji , Simon Horman , Maher Sanalla , Parav Pandit , Kees Cook , Moshe Shemesh , Patrisious Haddad , , , , Gal Pressman Subject: [PATCH net-next 12/15] net/mlx5: LAG, add MPESW over SD LAG support Date: Thu, 4 Jun 2026 14:44:52 +0300 Message-ID: <20260604114455.434711-13-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20260604114455.434711-1-tariqt@nvidia.com> References: <20260604114455.434711-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF00000206:EE_|BL1PR12MB5801:EE_ X-MS-Office365-Filtering-Correlation-Id: 90d3410e-3244-4a08-e5bc-08dec22ef12b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|82310400026|376014|7416014|1800799024|18002099003|22082099003|6133799003|56012099006|11063799006; X-Microsoft-Antispam-Message-Info: xg/ZTpDJ6M3Z0lHiD2f6EJuLKroPW56O3k9BquyC6DxmANLnIQWaU/IAORAlxBGo5+93y0Vak1ScSxcu0dr+vtouUWW5oiUXgAeqMiK3gb6HFvoH4jJ2PPHp1ccBpRMAzgpbuUnzi2uUehtcPMV58spOGYh/4TRRDRYReXcBet9DjToN8ZsSquLn+RsPoTqptKBp48zBOuoLKh/KgYeSo6tCeQbjwd81k8uhGBwgb1PXDj/VaotXCLPgIFDAbkVUeJmaLJXIQ0LTl+tmFBhpMuL8Zc6mlJZq7ONAkuj8KLrB1tvuxUeown2TCSPDLytDtQC8pA9NuJ2zI3SP2LX2kyE8xUF7YGKjMMeJFKlKT26ytkXFz0l496BTBRjNZYSLqywwBXV+SjD27sdaRwqGfsnpQx6zDKgPbomZ7SH+tyKUGzQq0eMhz/cw0/IkCHWlcT7A3T6o9B1WehOQvcTCJIij68cGputGkiV/2wmiws1DMCBoz1QptpPl7Nf0P74q+0AE8bOZI+Lgp4LpUhtUCqvfPBZWWbM30K5aA23d+lpDma+RnSWQWQbY++S8OqBsw+Bb6s4EPJvfxi+7u2w3mAk7R5VK3p2VdrNfY6u2+hDUx/eRwSD2jEnul01aMWNlNGKHcG+mCegyDhWGa+wl699NXGmcT17pcFz8AcRZyTQyyHcgRHaL6nsBvI2L31JTaaSZ2bZboIv4fkqhe8pb7b+LyvkF2+NsHl5d0FnmELg= X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700016)(82310400026)(376014)(7416014)(1800799024)(18002099003)(22082099003)(6133799003)(56012099006)(11063799006);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: PndICmx78XGrhhw2OlAgUNj22TkRddRca03zdnnA+ig29wZGr8EEj+RjuEPxgayambJB9ThvTuBvd3pxdCBsShkB6DHeG1pp7VSrHtWSyagwrk1kCuQSJp05u3Gm0TpGMo9f8m4OJmOlAgjiSIHCsKf25RynssC/gs3+bgFxVqSiwzjqicx8xqzMbmKJkIqpwlB+CXcgifLB7bJKzyLq16OZiayVExfDJhN+E+/RB0oKnjUSH5khQyDofHuX1Ewt3lfoGwYHua2tRhUvlZ4DqrmdoJRUFfb8YthIetTHJal5hJ2HRu/BleWLYdzI3NbAZAJd946dhb5yaWxo3I7I3Z7GwObRId284NhCKfweIbqVLk4XiJnQQEyTkWHcBE+gc+hZC+SspQOjW+GSAGStQpKH17QqPhYTytS4vXhZalilGjlC+4b3v1mldHqEdgL3 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Jun 2026 11:46:40.3391 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 90d3410e-3244-4a08-e5bc-08dec22ef12b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF00000206.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5801 From: Shay Drory Enable MPESW LAG creation over SD LAG members, forming a composite LAG hierarchy. This allows bonding multiple SD groups together under a single MPESW configuration with shared FDB. When enabling composite MPESW, the individual SD LAG shared FDB configurations are temporarily torn down and recreated when the composite LAG is disabled. Signed-off-by: Shay Drory Reviewed-by: Mark Bloch Signed-off-by: Tariq Toukan --- .../net/ethernet/mellanox/mlx5/core/lag/lag.c | 6 ++ .../net/ethernet/mellanox/mlx5/core/lag/lag.h | 8 ++ .../ethernet/mellanox/mlx5/core/lag/mpesw.c | 95 +++++++++++++++++-- .../ethernet/mellanox/mlx5/core/lag/mpesw.h | 4 + 4 files changed, 105 insertions(+), 8 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c index 9566fbf59fdb..25a9012e3014 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c @@ -2545,6 +2545,7 @@ void mlx5_lag_disable_change(struct mlx5_core_dev *dev) struct mlx5_core_dev *primary; struct mlx5_lag *ldev; struct lag_func *pf; + bool mpesw; int i; ldev = mlx5_lag_dev(dev); @@ -2553,6 +2554,9 @@ void mlx5_lag_disable_change(struct mlx5_core_dev *dev) primary = mlx5_sd_get_primary(dev) ?: dev; mlx5_devcom_comp_lock(primary->priv.hca_devcom_comp); + mpesw = ldev->mode == MLX5_LAG_MODE_MPESW; + if (mpesw) + mlx5_mpesw_sd_devcoms_lock(ldev); mutex_lock(&ldev->lock); ldev->mode_changes_in_progress++; @@ -2564,6 +2568,8 @@ void mlx5_lag_disable_change(struct mlx5_core_dev *dev) } mutex_unlock(&ldev->lock); + if (mpesw) + mlx5_mpesw_sd_devcoms_unlock(ldev); mlx5_devcom_comp_unlock(primary->priv.hca_devcom_comp); if (!sd_devcom) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h index 34350b0a7307..3a90d360d724 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h @@ -157,6 +157,14 @@ __mlx5_lag_is_sd(struct mlx5_lag *ldev, struct mlx5_core_dev *dev) return pf && pf->group_id != 0; } +static inline bool +__mlx5_lag_dev_is_port(struct mlx5_lag *ldev, struct mlx5_core_dev *dev) +{ + struct lag_func *pf = mlx5_lag_pf_by_dev(ldev, dev); + + return pf && xa_get_mark(&ldev->pfs, pf->idx, MLX5_LAG_XA_MARK_PORT); +} + static inline bool __mlx5_lag_is_active(struct mlx5_lag *ldev) { diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c b/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c index 2cb44084e239..50bfb450c71e 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c @@ -15,7 +15,7 @@ static void mlx5_mpesw_metadata_cleanup(struct mlx5_lag *ldev) u32 pf_metadata; int i; - mlx5_ldev_for_each(i, 0, ldev) { + mlx5_lag_for_each(i, 0, ldev, MLX5_LAG_FILTER_ALL) { dev = mlx5_lag_pf(ldev, i)->dev; esw = dev->priv.eswitch; pf_metadata = ldev->lag_mpesw.pf_metadata[i]; @@ -36,7 +36,7 @@ static int mlx5_mpesw_metadata_set(struct mlx5_lag *ldev) u32 pf_metadata; int i, err; - mlx5_ldev_for_each(i, 0, ldev) { + mlx5_lag_for_each(i, 0, ldev, MLX5_LAG_FILTER_ALL) { dev = mlx5_lag_pf(ldev, i)->dev; esw = dev->priv.eswitch; pf_metadata = mlx5_esw_match_metadata_alloc(esw); @@ -52,7 +52,7 @@ static int mlx5_mpesw_metadata_set(struct mlx5_lag *ldev) goto err_metadata; } - mlx5_ldev_for_each(i, 0, ldev) { + mlx5_lag_for_each(i, 0, ldev, MLX5_LAG_FILTER_ALL) { dev = mlx5_lag_pf(ldev, i)->dev; mlx5_notifier_call_chain(dev->priv.events, MLX5_DEV_EVENT_MULTIPORT_ESW, (void *)0); @@ -65,6 +65,48 @@ static int mlx5_mpesw_metadata_set(struct mlx5_lag *ldev) return err; } +static void mlx5_mpesw_restore_sd_fdb(struct mlx5_lag *ldev) +{ + struct lag_func *pf; + int err, i; + + mlx5_ldev_for_each(i, 0, ldev) { + pf = mlx5_lag_pf(ldev, i); + err = mlx5_lag_shared_fdb_create(ldev, NULL, 0, pf->group_id); + if (err) + mlx5_core_warn(pf->dev, + "Failed to restore SD shared FDB (%d)\n", + err); + } +} + +static int mlx5_mpesw_teardown_sd_fdb(struct mlx5_lag *ldev) +{ + struct lag_func *pf; + int i; + + mlx5_ldev_for_each(i, 0, ldev) { + pf = mlx5_lag_pf(ldev, i); + if (!pf->sd_fdb_active) + continue; + mlx5_lag_shared_fdb_destroy(ldev, pf->group_id); + } + return 0; +} + +static bool mlx5_lag_has_sd_group(struct mlx5_lag *ldev) +{ + struct lag_func *pf; + int i; + + mlx5_ldev_for_each(i, 0, ldev) { + pf = mlx5_lag_pf(ldev, i); + if (pf->group_id) + return true; + } + return false; +} + static int mlx5_lag_enable_mpesw(struct mlx5_lag *ldev) { int idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1); @@ -92,10 +134,17 @@ static int mlx5_lag_enable_mpesw(struct mlx5_lag *ldev) if (err) return err; + if (mlx5_lag_has_sd_group(ldev)) + mlx5_mpesw_teardown_sd_fdb(ldev); + err = mlx5_lag_shared_fdb_create(ldev, NULL, MLX5_LAG_MODE_MPESW, MLX5_LAG_FILTER_ALL); if (err) { - mlx5_core_warn(dev0, "Failed to create LAG in MPESW mode (%d)\n", err); + mlx5_core_warn(dev0, + "Failed to create LAG in MPESW mode (%d)\n", + err); + if (mlx5_lag_has_sd_group(ldev)) + mlx5_mpesw_restore_sd_fdb(ldev); mlx5_mpesw_metadata_cleanup(ldev); return err; } @@ -105,9 +154,36 @@ static int mlx5_lag_enable_mpesw(struct mlx5_lag *ldev) void mlx5_lag_disable_mpesw(struct mlx5_lag *ldev) { - if (ldev->mode == MLX5_LAG_MODE_MPESW) { - mlx5_mpesw_metadata_cleanup(ldev); - mlx5_lag_shared_fdb_destroy(ldev, MLX5_LAG_FILTER_ALL); + if (ldev->mode != MLX5_LAG_MODE_MPESW) + return; + + mlx5_mpesw_metadata_cleanup(ldev); + mlx5_lag_shared_fdb_destroy(ldev, MLX5_LAG_FILTER_ALL); + if (mlx5_lag_has_sd_group(ldev)) + mlx5_mpesw_restore_sd_fdb(ldev); +} + +void mlx5_mpesw_sd_devcoms_lock(struct mlx5_lag *ldev) +{ + struct mlx5_devcom_comp_dev *sd_devcom; + int i; + + mlx5_ldev_for_each(i, 0, ldev) { + sd_devcom = mlx5_sd_get_devcom(mlx5_lag_pf(ldev, i)->dev); + if (sd_devcom) + mlx5_devcom_comp_lock(sd_devcom); + } +} + +void mlx5_mpesw_sd_devcoms_unlock(struct mlx5_lag *ldev) +{ + struct mlx5_devcom_comp_dev *sd_devcom; + int i; + + mlx5_ldev_for_each_reverse(i, MLX5_MAX_PORTS, 0, ldev) { + sd_devcom = mlx5_sd_get_devcom(mlx5_lag_pf(ldev, i)->dev); + if (sd_devcom) + mlx5_devcom_comp_unlock(sd_devcom); } } @@ -122,6 +198,7 @@ static void mlx5_mpesw_work(struct work_struct *work) return; mlx5_devcom_comp_lock(devcom); + mlx5_mpesw_sd_devcoms_lock(ldev); mutex_lock(&ldev->lock); if (ldev->mode_changes_in_progress) { mpesww->result = -EAGAIN; @@ -134,6 +211,7 @@ static void mlx5_mpesw_work(struct work_struct *work) mlx5_lag_disable_mpesw(ldev); unlock: mutex_unlock(&ldev->lock); + mlx5_mpesw_sd_devcoms_unlock(ldev); mlx5_devcom_comp_unlock(devcom); complete(&mpesww->comp); } @@ -199,7 +277,8 @@ bool mlx5_lag_is_mpesw(struct mlx5_core_dev *dev) { struct mlx5_lag *ldev = mlx5_lag_dev(dev); - return ldev && ldev->mode == MLX5_LAG_MODE_MPESW; + return ldev && ldev->mode == MLX5_LAG_MODE_MPESW && + __mlx5_lag_dev_is_port(ldev, dev); } EXPORT_SYMBOL(mlx5_lag_is_mpesw); diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.h b/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.h index b767dbb4f457..5099723ba0f7 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.h @@ -33,8 +33,12 @@ void mlx5_lag_mpesw_disable(struct mlx5_core_dev *dev); int mlx5_lag_mpesw_enable(struct mlx5_core_dev *dev); #ifdef CONFIG_MLX5_ESWITCH void mlx5_lag_disable_mpesw(struct mlx5_lag *ldev); +void mlx5_mpesw_sd_devcoms_lock(struct mlx5_lag *ldev); +void mlx5_mpesw_sd_devcoms_unlock(struct mlx5_lag *ldev); #else static inline void mlx5_lag_disable_mpesw(struct mlx5_lag *ldev) {} +static inline void mlx5_mpesw_sd_devcoms_lock(struct mlx5_lag *ldev) {} +static inline void mlx5_mpesw_sd_devcoms_unlock(struct mlx5_lag *ldev) {} #endif /* CONFIG_MLX5_ESWITCH */ #ifdef CONFIG_MLX5_ESWITCH -- 2.44.0