From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 83B1A378826; Sun, 14 Jun 2026 17:01:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781456465; cv=none; b=d7X/+glvAbA3sQm3PTGwjWlETKKU7aGmgqX4i2xE4+8sLtNlZAUpkqwDbRm6KdjLkKsztxod3v1+6FRAv7gCD2B17hja3w8/nwxjCTOqs0e0PES0mZSWjbsvjuzi/sycT7wGdZ5XB/iA6dRtNYnZ/1icLAvIzx11uwS5YhjFktw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781456465; c=relaxed/simple; bh=6MRO6vN3B7IlA1Ux4zPC9NTlO8N5cg83MY+qN5v8zE8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=eqwm+knhZOZK0kgFj46Q7rFrCx5MhxWzzBTBs98F0aRt1GsWG2nQ2bE1FQYla7nimk60DXaA5IUzigIGuTbPY2RQC6bBJ5x0wZH4Ln8inaic5WoM4C9xXq18/JaPlPV26NiauPt9y9Yn8NZZHCFnxy19aidicyXmx06jTasb9OM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=WzbC0aEK; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="WzbC0aEK" Received: by smtp.kernel.org (Postfix) with ESMTPS id 4AEBFC4AF18; Sun, 14 Jun 2026 17:01:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1781456465; bh=6MRO6vN3B7IlA1Ux4zPC9NTlO8N5cg83MY+qN5v8zE8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=WzbC0aEK/QMjr9xk4QPU89zkUxWHxG6PCqLOTMwHG9+7HNt8NvxlCFjWyPvqNEFAr uzL2Fb1rHVYD0oVqZbfFJCvB4Q7smkz+A7Y6kw1XLfv8v4uzPwNlpyJ2S5QOf9kHLH OY8Z4Q8USDcC3IvjNOu0o0PJTgdei1wxwC+L8fwqQ8g225pHDgTUWBI3o+/Y0AQuaz OKKRcf1lfHlKWxGJWcRANBQShARwreWz3bTBFLX+SfFw4OFgu7KBC+/ARTGmvjscXw i76IA4bAK9SqnGM/IH4T9FM9nJmUoZskDILwxZLVsvUAzzuJzIc0b49oZO9nb/lZz9 t+5qqkliNGhgA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3FE3FCD98C7; Sun, 14 Jun 2026 17:01:05 +0000 (UTC) From: Selvamani Rajagopal via B4 Relay Date: Sun, 14 Jun 2026 10:00:20 -0700 Subject: [PATCH net-next v5 04/15] net: phy: microchip_t1s: Use generic APIs for C45 read and write Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260614-s2500-mac-phy-support-v5-4-89874b72f725@onsemi.com> References: <20260614-s2500-mac-phy-support-v5-0-89874b72f725@onsemi.com> In-Reply-To: <20260614-s2500-mac-phy-support-v5-0-89874b72f725@onsemi.com> To: Andrew Lunn , Piergiorgio Beruto , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , Parthiban Veerasooran , Selva Rajagopal , Richard Cochran , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Simon Horman , Jonathan Corbet , Shuah Khan Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, Jerry Ray , Selvamani Rajagopal X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1781456463; l=2705; i=Selvamani.Rajagopal@onsemi.com; s=20260531; h=from:subject:message-id; bh=HCjjokUdx1W5w+84nSMELSQPuuStnPKCwL0RzI0cpGk=; b=JWDU4krYodqhjeF2A3f7NT5fmJZa16+SphgLO5769V+Lu0YGrqkSBtSMuydZYWpq/G9Cd7VJd Vz1Df5j0q6iDCZi+0Aw3B7g4nPYAE3PAVKEET6doEkOWkQ1Y9Tvca31 X-Developer-Key: i=Selvamani.Rajagopal@onsemi.com; a=ed25519; pk=5QRdM0HS/LGWWcUZZ9hVfZ+qbPQGZCumcTXOiN7Fyug= X-Endpoint-Received: by B4 Relay for Selvamani.Rajagopal@onsemi.com/20260531 with auth_id=803 X-Original-From: Selvamani Rajagopal Reply-To: Selvamani.Rajagopal@onsemi.com From: Selvamani Rajagopal Replace vendor implementation with generic API to read and write PHY registers using C45 bus protocol. Reviewed-by: Andrew Lunn Signed-off-by: Selvamani Rajagopal --- changes in v5 - no change changes in v4 - no change changes in v3 - Updated vendor specific phy_read_mmd/phy_write_mmd functions to use genphy read/write APIs that is introduced - First patch --- drivers/net/phy/microchip_t1s.c | 32 ++------------------------------ 1 file changed, 2 insertions(+), 30 deletions(-) diff --git a/drivers/net/phy/microchip_t1s.c b/drivers/net/phy/microchip_t1s.c index e601d56b2507..0c4dc70641d8 100644 --- a/drivers/net/phy/microchip_t1s.c +++ b/drivers/net/phy/microchip_t1s.c @@ -506,34 +506,6 @@ static int lan86xx_read_status(struct phy_device *phydev) return 0; } -/* OPEN Alliance 10BASE-T1x compliance MAC-PHYs will have both C22 and - * C45 registers space. If the PHY is discovered via C22 bus protocol it assumes - * it uses C22 protocol and always uses C22 registers indirect access to access - * C45 registers. This is because, we don't have a clean separation between - * C22/C45 register space and C22/C45 MDIO bus protocols. Resulting, PHY C45 - * registers direct access can't be used which can save multiple SPI bus access. - * To support this feature, set .read_mmd/.write_mmd in the PHY driver to call - * .read_c45/.write_c45 in the OPEN Alliance framework - * drivers/net/ethernet/oa_tc6.c - */ -static int lan865x_phy_read_mmd(struct phy_device *phydev, int devnum, - u16 regnum) -{ - struct mii_bus *bus = phydev->mdio.bus; - int addr = phydev->mdio.addr; - - return __mdiobus_c45_read(bus, addr, devnum, regnum); -} - -static int lan865x_phy_write_mmd(struct phy_device *phydev, int devnum, - u16 regnum, u16 val) -{ - struct mii_bus *bus = phydev->mdio.bus; - int addr = phydev->mdio.addr; - - return __mdiobus_c45_write(bus, addr, devnum, regnum, val); -} - static struct phy_driver microchip_t1s_driver[] = { { PHY_ID_MATCH_EXACT(PHY_ID_LAN867X_REVB1), @@ -584,8 +556,8 @@ static struct phy_driver microchip_t1s_driver[] = { .features = PHY_BASIC_T1S_P2MP_FEATURES, .config_init = lan865x_revb_config_init, .read_status = lan86xx_read_status, - .read_mmd = lan865x_phy_read_mmd, - .write_mmd = lan865x_phy_write_mmd, + .read_mmd = genphy_phy_read_mmd, + .write_mmd = genphy_phy_write_mmd, .get_plca_cfg = genphy_c45_plca_get_cfg, .set_plca_cfg = lan86xx_plca_set_cfg, .get_plca_status = genphy_c45_plca_get_status, -- 2.43.0