From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 34DAA3A6F06; Wed, 24 Jun 2026 09:32:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782293549; cv=none; b=i8MvXLg/5hA2fHTbVtazv0L9zU0TGRUv9A3FD5VVOPp6zKqPvvVZ5NphpsZiEjOe1aMZHvnHyYUyYa+g8n1wvh+3AKariXXVwrb6T9vnj0kNA/IXaPduJRoDYl0SII3l3S/uSA/tR/wOnQlpTR/7E+KmlnFAbxJurE0WkOl4Aa4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782293549; c=relaxed/simple; bh=sMm9upJlaJsbNbTO7Jo3M02LCg88L0kl6E3/iAO3n9U=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=BjKllwJGkXr8TfSBAt+BtawNL6oPGF5nTlb+uasExdxYmyvTBdhe+TYr6uIUpyF7wnbwGZAtV3Ky8EokUhWT8/E7DiRxMDIaKEVfpZCwmA3mLCnc8/JRv5LTm3BOGA7PWsR6jJnaZW6t6eC8VmOY+bPi/RzYvf+r2a7PoMqfwBU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=l8/hAtVJ; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=EDm9TOMF; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="l8/hAtVJ"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="EDm9TOMF" Date: Wed, 24 Jun 2026 11:32:18 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1782293540; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=sMm9upJlaJsbNbTO7Jo3M02LCg88L0kl6E3/iAO3n9U=; b=l8/hAtVJaTldoYHTcaHokyZaSvdPmG4eThHWPjl4rJmLwkHrkD9hl5hww0LZkd+yVyheM+ PLjxhVOUfuwIhsFRWXE6DwzGxCwYN/e5V5YODq89XR/NlXQxRBD0a/vr420kGrJfflAsY+ gWN9WOhkoYyDVw+lQcaUfXEYCgJbQqg0STpjIh8oMuB42uOxMr254iRUey7+zmqZjydaOR vurYiudtRlvkCm/E5Wbu7+2qIgFJDrOMLPqCCItwh+TZUubQ2U1EP3vOi76ukcqne6RhMW X97e3CrtwICX8+FRdx3YATMXNrZMZvU+TwKmHPH5pgIOcFJK48LhDPq+bKkJIg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1782293540; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=sMm9upJlaJsbNbTO7Jo3M02LCg88L0kl6E3/iAO3n9U=; b=EDm9TOMFjOMDYcbqSQ2UeP+xhE99vKDl2Cq3gweAT6k0ntTJAj26J0nxcT0CsM6VpB7PfF Giecms/1+WadleAw== From: Sebastian Andrzej Siewior To: "Zhou, Yun" Cc: marcin.s.wojtas@gmail.com, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, maxime.chevallier@bootlin.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3] net: mvneta: re-enable percpu interrupt on resume Message-ID: <20260624093218.G7t8fj4a@linutronix.de> References: <20260618104351.3456161-1-yun.zhou@windriver.com> <20260618125128.h5g-StPH@linutronix.de> <06d0158e-bf4c-4ad1-8ad3-c8176003ab11@windriver.com> <20260618150440.cLDwgyDM@linutronix.de> <3a4ba3da-47ee-4da7-b0da-af500ff1a369@windriver.com> <20260618155337._cxJpvd0@linutronix.de> <52e2dc9b-45ce-4779-8ca3-b4e022380db6@windriver.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable In-Reply-To: <52e2dc9b-45ce-4779-8ca3-b4e022380db6@windriver.com> On 2026-06-19 09:15:05 [+0800], Zhou, Yun wrote: > This is a hardware constraint, not a software design choice. >=20 =E2=80=A6 > This means request_percpu_irq() is the only valid registration > method =E2=80=94 a plain request_irq() would fail with -EINVAL because the > irq descriptor requires IRQ_PER_CPU_DEVID semantics. =E2=80=A6 > The multi-interrupt approach (like MSI-X NICs) would require the > hardware to provide multiple distinct interrupt lines per port, > which this SoC does not have. I don't question that. There might have been an option route that interrupt source differently. If it is not the case, then there is not much you can do. Thank you for the explanation. > BR, > Yun Sebastian