From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A7354389460; Tue, 30 Jun 2026 09:24:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782811482; cv=none; b=X7LeKSPKjr5Wo4aeBLwIHwH4lW/kP7jr0n50Y3K4RvDGk9oTbNbKxUZkQ2JPiZIi9dkNF0GE1bLK0KmuZaitNq3ZIb47zltwMlo5pt7CU3/6NHvpp9pIZv2U3r3dCRbiykkZ2X3zo3c0moCUv8Q8ogU2BRjjld03ttOnZSRj0Ok= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782811482; c=relaxed/simple; bh=fBjF5q8rMNKv9vykdAVJd2NPBRLDCwvihjU5T1PBix4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=PMjM661uxWs7dRt2/LwkrPDIyeyk8vrskLneko/4cZMZAVMsNHBvxbZorecRS8RIFxoyyyIvYMIlvuFZ6DsngLcZvwWyL9RdrAfyx0GQgjG0FDJclnx7Y8tzKocptlcXytNSrCZDDd7AJVkF5rkLKFg+TQm6cbvhoF5ulCmqGFA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=ZsVFwsKu; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="ZsVFwsKu" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1782811481; x=1814347481; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fBjF5q8rMNKv9vykdAVJd2NPBRLDCwvihjU5T1PBix4=; b=ZsVFwsKu5maB2tmPm+IGn+cA5kMMfifMvXnMNa9zi26bLzputPgeHT0X sOt7AfEokXFpDaCnD8/6lPxX1Sz9DMD3DDW2zzwrA21r1WV8SPyTPI0+u 7G9Jq06CxnaUUA2oep3QulvUhcde5htPghikfGUsgDbUSLDX0sgQFCFrd B2EGEfc11c32+Q+za9RISkNl5BbmFl/pGDvX9KUAbS1Kr7DTDIpJgSWOt p3Tifbp/TJEhEV/UU1SIpLagZbjGn2J3cCaUupqbpEYs9FGNCCa8K2k+B JsprUzTmAQFxk5IAKPvf4kfqSrGBD0bIj+/IjHdbBhfV+SQBJASaElY/b A==; X-CSE-ConnectionGUID: y2UMO1geT8GzPovUCZd3nA== X-CSE-MsgGUID: TlvWtXBrQO6e5+zhhZ/sog== X-IronPort-AV: E=Sophos;i="6.24,233,1774335600"; d="scan'208";a="59032186" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 30 Jun 2026 02:24:40 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Tue, 30 Jun 2026 02:24:40 -0700 Received: from che-ll-i67131.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Tue, 30 Jun 2026 02:24:32 -0700 From: Manikandan Muralidharan To: , , , , , , , , , , , , , , , , , , , , , , CC: Manikandan Muralidharan Subject: [PATCH v4 1/7] dt-bindings: mtd: jedec,spi-nor: allow the SFDP to be exposed via NVMEM Date: Tue, 30 Jun 2026 14:54:00 +0530 Message-ID: <20260630092406.150587-2-manikandan.m@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260630092406.150587-1-manikandan.m@microchip.com> References: <20260630092406.150587-1-manikandan.m@microchip.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Add an optional "sfdp" child node (compatible "jedec,sfdp") that describes the SFDP as a read-only NVMEM provider via nvmem.yaml, so its contents (e.g. a vendor EUI-48/EUI-64) can be read through NVMEM cells. Signed-off-by: Manikandan Muralidharan --- .../devicetree/bindings/mtd/jedec,spi-nor.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml index 587af4968255..98fd954598ab 100644 --- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml +++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml @@ -103,6 +103,20 @@ properties: spi-cpol: true spi-cpha: true + sfdp: + $ref: /schemas/nvmem/nvmem.yaml# + unevaluatedProperties: false + description: + The Serial Flash Discoverable Parameters (SFDP) tables exposed as a + read-only NVMEM device. This allows standard or vendor-specific SFDP + data (for example a factory-programmed EUI-48/EUI-64 identifier) to be + consumed through NVMEM cells. + properties: + compatible: + const: jedec,sfdp + required: + - compatible + dependencies: spi-cpol: [ spi-cpha ] spi-cpha: [ spi-cpol ] @@ -122,6 +136,10 @@ examples: spi-max-frequency = <40000000>; m25p,fast-read; reset-gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + + sfdp { + compatible = "jedec,sfdp"; + }; }; }; ... -- 2.43.0