From: Riana Tauro <riana.tauro@intel.com>
To: intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
netdev@vger.kernel.org
Cc: aravind.iddamsetty@linux.intel.com, anshuman.gupta@intel.com,
rodrigo.vivi@intel.com, joonas.lahtinen@linux.intel.com,
kuba@kernel.org, simona.vetter@ffwll.ch, airlied@gmail.com,
pratik.bari@intel.com, joshua.santosh.ranjan@intel.com,
ashwin.kumar.kulkarni@intel.com, shubham.kumar@intel.com,
ravi.kishore.koppuravuri@intel.com, raag.jadav@intel.com,
maarten.lankhorst@linux.intel.com, mallesh.koujalagi@intel.com,
soham.purkait@intel.com, Riana Tauro <riana.tauro@intel.com>
Subject: [PATCH v4 2/3] drm/xe/xe_drm_ras: Add error-event support for PVC
Date: Wed, 1 Jul 2026 15:14:12 +0530 [thread overview]
Message-ID: <20260701094409.129131-7-riana.tauro@intel.com> (raw)
In-Reply-To: <20260701094409.129131-5-riana.tauro@intel.com>
Report drm_ras error event to userspace when an error occurs.
Add support for core-compute and SoC errors in PVC.
$ sudo ynl --family drm_ras --output-json --subscribe error-report
{
"name": "error-event",
"msg": {
"device-name": "0000:03:00.0",
"node-id": 1,
"node-name": "uncorrectable-errors",
"error-id": 1,
"error-name": "core-compute",
"error-value": 1
}
}
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Raag Jadav <raag.jadav@intel.com>
---
v2: use ynl (Raag)
use value as function parameter
move error event call to hw_error_source_handler
v3: add has_drm_ras check
v4: use drm_err_ratelimited
initialize node post drm_ras check (Sashiko)
---
drivers/gpu/drm/xe/xe_drm_ras.c | 32 ++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_drm_ras.h | 3 +++
drivers/gpu/drm/xe/xe_hw_error.c | 5 ++++-
3 files changed, 39 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_drm_ras.c b/drivers/gpu/drm/xe/xe_drm_ras.c
index 7937d8ba0ed9..8e247a8139b1 100644
--- a/drivers/gpu/drm/xe/xe_drm_ras.c
+++ b/drivers/gpu/drm/xe/xe_drm_ras.c
@@ -185,6 +185,38 @@ static int register_nodes(struct xe_device *xe)
return ret;
}
+/**
+ * xe_drm_ras_event() - Report drm_ras error event to userspace
+ * @xe: xe device structure
+ * @component: error component (see &enum drm_xe_ras_error_component)
+ * @severity: error severity (see &enum drm_xe_ras_error_severity)
+ * @value: value of error counter
+ * @flags: flags for allocation
+ *
+ * Report an error-event to userspace.
+ */
+void xe_drm_ras_event(struct xe_device *xe, u32 component, u32 severity, u32 value, gfp_t flags)
+{
+ struct xe_drm_ras *ras = &xe->ras;
+ struct xe_drm_ras_counter *info = ras->info[severity];
+ struct drm_ras_node *node;
+ int ret;
+
+ /* Event is supported only if drm_ras is enabled */
+ if (!xe->info.has_drm_ras)
+ return;
+
+ node = &ras->node[severity];
+
+ if (!info || !info[component].name)
+ return;
+
+ ret = drm_ras_nl_error_event(node, component, info[component].name, value, flags);
+ if (ret)
+ drm_err_ratelimited(&xe->drm, "drm_ras error-event failed: %d for %s %s\n", ret,
+ info[component].name, error_severity[severity]);
+}
+
/**
* xe_drm_ras_init() - Initialize DRM RAS
* @xe: xe device instance
diff --git a/drivers/gpu/drm/xe/xe_drm_ras.h b/drivers/gpu/drm/xe/xe_drm_ras.h
index 365c70e93e82..2a694bf69478 100644
--- a/drivers/gpu/drm/xe/xe_drm_ras.h
+++ b/drivers/gpu/drm/xe/xe_drm_ras.h
@@ -5,11 +5,14 @@
#ifndef _XE_DRM_RAS_H_
#define _XE_DRM_RAS_H_
+#include <linux/types.h>
+
struct xe_device;
#define for_each_error_severity(i) \
for (i = 0; i < DRM_XE_RAS_ERR_SEV_MAX; i++)
int xe_drm_ras_init(struct xe_device *xe);
+void xe_drm_ras_event(struct xe_device *xe, u32 component, u32 severity, u32 value, gfp_t flags);
#endif
diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
index 4a4b363fc844..a833cecc74ec 100644
--- a/drivers/gpu/drm/xe/xe_hw_error.c
+++ b/drivers/gpu/drm/xe/xe_hw_error.c
@@ -432,7 +432,7 @@ static void hw_error_source_handler(struct xe_tile *tile, const enum hardware_er
struct xe_drm_ras *ras = &xe->ras;
struct xe_drm_ras_counter *info = ras->info[severity];
unsigned long flags, err_src;
- u32 err_bit;
+ u32 err_bit, value;
if (!IS_DGFX(xe))
return;
@@ -495,6 +495,9 @@ static void hw_error_source_handler(struct xe_tile *tile, const enum hardware_er
gt_hw_error_handler(tile, hw_err, error_id);
if (err_bit == XE_SOC_ERROR)
soc_hw_error_handler(tile, hw_err, error_id);
+
+ value = atomic_read(&info[error_id].counter);
+ xe_drm_ras_event(xe, error_id, severity, value, GFP_ATOMIC);
}
clear_reg:
--
2.47.1
next prev parent reply other threads:[~2026-07-01 9:44 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-01 9:44 [PATCH v4 0/3] Add drm_ras netlink error event support Riana Tauro
2026-07-01 9:44 ` [PATCH v4 1/3] drm/drm_ras: Add drm_ras netlink error event Riana Tauro
2026-07-01 9:44 ` Riana Tauro [this message]
2026-07-01 9:44 ` [PATCH v4 3/3] drm/xe/xe_ras: Add error-event support for CRI Riana Tauro
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