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Tue, 7 Jul 2026 10:45:32 -0700 From: Mark Bloch To: Jiri Pirko , Eric Dumazet , "Jakub Kicinski" , Paolo Abeni , Simon Horman CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Andrew Lunn , Jonathan Corbet , Shuah Khan , , , , Mark Bloch Subject: [PATCH net-next V5 0/6] devlink: Add boot-time eswitch mode defaults Date: Tue, 7 Jul 2026 20:45:21 +0300 Message-ID: <20260707174527.425134-1-mbloch@nvidia.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH2PEPF0000013B:EE_|PH7PR12MB6395:EE_ X-MS-Office365-Filtering-Correlation-Id: 5336d72d-a423-4b0f-0b02-08dedc4f933e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|7416014|1800799024|36860700016|23010399003|3023799007|18002099003|56012099006|11063799006|6133799003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: n8REWwoR/hN9Ann0KVNmCVC+Jt3NICHJqUxDwuqEYbNA5rj8vQFscPVXptZltvT2JMigE5bSNcNspV4NTggetK91L/cjm/eSURh64gm3mBoKwlqrtSxSAwF3yZftIf/XdW3X+xj9eUAW/yfHsl2nsKioubx0FQ+VNRUA3d4Bjv2JOHJEYDKDClb8HY+Gf+naj9kq9VR0Zj3fk9Unx7jrnYvI4eB2KvxcPTqVQJIsyubuVpKccOjZz7+lWc9sAdyBnZKVMhT6+1r40xw2Xou9Ja9PO5nwDeAa0TorZt8IXHCoH3NWVI3csaSZkWQFsgwG88AJ9ojRBoE6SqxAiGyruiSnyU8VrQ2LpatUO/3JhzYhHoYLwEY2Ws0otlqVdtvpFwQOfDgQH+ED3t1Hejoca7fUpvCVTUAG5EFITOiyX0Z/vAQyjQAauRGIxPGgxjrJ X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jul 2026 17:45:46.2563 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5336d72d-a423-4b0f-0b02-08dedc4f933e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH2PEPF0000013B.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6395 This series adds a devlink_eswitch_mode= kernel command line parameter for setting a default devlink eswitch mode during boot. Following the discussion with Jakub[1] and the feedback on the RFC postings, this version keeps the scope limited to a boot-time devlink eswitch mode default only. The option selects either all devlink handles or an explicit comma-separated handle list: devlink_eswitch_mode=*=switchdev devlink_eswitch_mode=pci/0000:08:00.0,pci/0000:09:00.1=switchdev_inactive The supported modes are legacy, switchdev and switchdev_inactive. The selected mode is applied through the existing eswitch_mode_set() devlink operation, the same operation used by the devlink eswitch mode command. Registration may happen before a driver is ready to change eswitch mode, so devlink core marks the default as pending and queues async work from devl_unlock() once the instance is registered. The worker takes the devlink instance lock before calling into the driver. After a successful reload that performed DRIVER_REINIT, devlink core already holds the devlink instance lock and the driver completed reload_up(), so the default is applied directly from the reload path. Drivers that know exactly when the device is ready can call devl_apply_default_esw_mode() directly. mlx5 uses this after initial probe, when the device is initialized and the devlink lock is already held. Patch 1 clears the mlx5 FW reset-in-progress bit before reload. Patch 2 factors the common eswitch mode set validation into a helper. Patch 3 adds the devlink_eswitch_mode= parser and documentation. Patch 4 applies parsed defaults from devlink core. Patch 5 adds devl_apply_default_esw_mode() for drivers. Patch 6 wires mlx5 to apply the default after initial probe. Changelog: v4 -> v5: - Moved the default eswitch mode code into a separate file, per Jiri's comment. - Dropped the delayed workqueue and switched to regular work triggered via devl_unlock(), per Jiri's comment. - Renamed some functions to better align with devlink code. v3 -> v4: - Rework registration time apply to use per devlink delayed work instead of calling eswitch_mode_set() directly from devl_register(). - Apply the default directly after successful DRIVER_REINIT devlink reload, where the devlink lock is already held and reload_up() has completed. - Add devl_apply_default_esw_mode() for drivers that know their exact ready point. - Drop the driver registration-ordering preparation patches that are no longer needed with the async registration apply path. v2 -> v3: - Change the devlink_eswitch_mode= API syntax to use = instead of []:, following a comment from Randy Dunlap. v1 -> v2: - Move default eswitch mode application into devlink core. The default is now applied during devlink registration and after a successful devlink reload that performed DRIVER_REINIT. - Remove the exported devl_apply_default_esw_mode() driver API and the mlx5 driver-side call to it. - Skip devlink health recovery notifications while the devlink instance is not registered, so drivers can move registration later without early health work hitting registration assertions. - Move mlx5 devlink registration after device initialization, including the lightweight init path, so the core can apply the default through the normal registration flow. - Move the matching netdevsim and mlx5 unregister paths before object teardown, so unregister notifications come from devl_unregister() and the later object teardown paths run while the devlink instance is no longer registered. - Add registration-ordering preparation patches for netdevsim and octeontx2 AF/PF, so their eswitch state is ready before registration-time defaults may call eswitch_mode_set(). [1] lore.kernel.org/r/20260502184153.4fd8d06f@kernel.org/ RFC v1: lore.kernel.org/r/20260506123739.1959770-1-mbloch@nvidia.com/ RFC v2: lore.kernel.org/r/20260510185424.2041415-1-mbloch@nvidia.com/ v1: lore.kernel.org/r/20260521072434.362624-1-tariqt@nvidia.com/ v2: lore.kernel.org/all/20260603193259.3412464-1-mbloch@nvidia.com/ v3: lore.kernel.org/all/20260605181030.3486619-1-mbloch@nvidia.com/ v4: lore.kernel.org/all/20260629182102.245150-1-mbloch@nvidia.com/ Mark Bloch (6): net/mlx5: Clear FW reset-in-progress bit before reload devlink: Factor out eswitch mode setting devlink: Parse eswitch mode boot defaults devlink: Apply eswitch mode boot defaults devlink: Add API to apply eswitch mode boot default net/mlx5: Apply devlink eswitch mode boot default on probe .../admin-guide/kernel-parameters.txt | 25 ++ .../networking/devlink/devlink-defaults.rst | 78 ++++ Documentation/networking/devlink/index.rst | 1 + .../ethernet/mellanox/mlx5/core/fw_reset.c | 28 +- .../net/ethernet/mellanox/mlx5/core/main.c | 13 + include/net/devlink.h | 1 + net/devlink/Makefile | 2 +- net/devlink/core.c | 13 + net/devlink/default.c | 364 ++++++++++++++++++ net/devlink/dev.c | 33 +- net/devlink/devl_internal.h | 12 + 11 files changed, 551 insertions(+), 19 deletions(-) create mode 100644 Documentation/networking/devlink/devlink-defaults.rst create mode 100644 net/devlink/default.c base-commit: 4a13f31a92f35161b499bf29638336885259da78 -- 2.43.0