From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 485233839B6; Thu, 9 Jul 2026 13:43:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783604582; cv=none; b=J4ZU+J3kH+7pRLiF4Jt0mGk9e+n2hFX2/+/jMrQe12Jl3c4EJdl4twHvjbF88Z54hE/COHzqN49szdjzpFQaLKcVhhzVmgdrMN450hphlPo+9z9PDMfcXeJXGh+M9sVqWmlCcOcatWGfrDzAHbUN8YhJiASQbxzfBnX5q22jfJ4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783604582; c=relaxed/simple; bh=2D9r64PmMn/aUcy8ufcjTpqOB+Pkyk4OdcYuFZ5sKms=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=r0De/gs4JCzCFMBW44DybbJVSmgQnOsIzUznp3orkR1aKoq9pHKt4UYQsFRVVlZFU951Vr4Jqn4/DJslN1uDHEigP0Ld0+kPHgla99a6adgxQebNzndCs/Yr1RPtClPxSw4Cp1+kq3WzvSDMUZZEk3YsYIRNDQiboWrvBX6W324= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=CJ2SRWT/; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="CJ2SRWT/" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1783604579; bh=2D9r64PmMn/aUcy8ufcjTpqOB+Pkyk4OdcYuFZ5sKms=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=CJ2SRWT/USyWyh+UbnSGT7T6C2nsOMONmtA/MaNqjZA8A35TtAl2yWEAcZ3t5fjkb MMjcW1nLOOn88iw0WHzMqLBsQa9e8GISZACX/aqBzAM1FCM9v4XX2e3w7ki3xWI4Tu OjPjBJUs8uzJ73RPP+fPNt+CpkYf0BSP5i0IVvlDWUWjr4ux3QK6DctQWoHl546eEK e5EtFVOC2IJ5BR0k8v1bb4/sp5HWEnQJNy6WDBqi0LejlBzHhUcgXqW0hzIW8ajhiW pvscMl5TNUp5iStTy2Rn9UBOdOQhixQwnurjCKX4ZKyR9W5X4nT606x82ZhfF3fz+W B+AXPGbXJJUIw== Received: from yukiji.home (unknown [100.64.0.131]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: laeyraud) by bali.collaboradmins.com (Postfix) with ESMTPSA id B03A617E0DFB; Thu, 09 Jul 2026 15:42:58 +0200 (CEST) From: Louis-Alexis Eyraud Date: Thu, 09 Jul 2026 15:42:43 +0200 Subject: [PATCH v2 03/18] dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8195 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260709-mt8189-clocks-system-base-v2-3-2926da3db6cf@collabora.com> References: <20260709-mt8189-clocks-system-base-v2-0-2926da3db6cf@collabora.com> In-Reply-To: <20260709-mt8189-clocks-system-base-v2-0-2926da3db6cf@collabora.com> To: Michael Turquette , Stephen Boyd , Brian Masney , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Chun-Jie Chen , Philipp Zabel , Edward-JW Yang , Richard Cochran Cc: kernel@collabora.com, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, netdev@vger.kernel.org, Louis-Alexis Eyraud X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1783604575; l=1522; i=louisalexis.eyraud@collabora.com; s=20250113; h=from:subject:message-id; bh=2D9r64PmMn/aUcy8ufcjTpqOB+Pkyk4OdcYuFZ5sKms=; b=sHVam2U9wFo8NSOS/GFeW6poHyIWSEJaRsEvD5tmjNjVhDBZVxFa/E2KbKLfEUC91onO3SN06 C+NMShbuGS6CSm2DevNok6tlfg/d6hXOupoxQkVeZGkXxG6dGh9Z63K X-Developer-Key: i=louisalexis.eyraud@collabora.com; a=ed25519; pk=CHFBDB2Kqh4EHc6JIqFn69GhxJJAzc0Zr4e8QxtumuM= Both MT8195 clock controllers dt-bindings (clock and sys-clock) document the '#clock-cells' property but do not enforce it as required property. As clock provider nodes should define this property in devicetrees, add it to the required property list in both its dt-bindings files. Signed-off-by: Louis-Alexis Eyraud --- Documentation/devicetree/bindings/clock/mediatek,mt8195-clock.yaml | 1 + Documentation/devicetree/bindings/clock/mediatek,mt8195-sys-clock.yaml | 1 + 2 files changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8195-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8195-clock.yaml index fcc963aff087..94dd29c2396c 100644 --- a/Documentation/devicetree/bindings/clock/mediatek,mt8195-clock.yaml +++ b/Documentation/devicetree/bindings/clock/mediatek,mt8195-clock.yaml @@ -58,6 +58,7 @@ properties: required: - compatible - reg + - '#clock-cells' additionalProperties: false diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8195-sys-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8195-sys-clock.yaml index 69f096eb168d..ba1b36fa0169 100644 --- a/Documentation/devicetree/bindings/clock/mediatek,mt8195-sys-clock.yaml +++ b/Documentation/devicetree/bindings/clock/mediatek,mt8195-sys-clock.yaml @@ -43,6 +43,7 @@ properties: required: - compatible - reg + - '#clock-cells' additionalProperties: false -- 2.55.0