From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from rtits2.realtek.com.tw (rtits2.realtek.com [211.75.126.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 46E98408022; Thu, 9 Jul 2026 10:09:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.75.126.72 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783591747; cv=none; b=MS1HJ82I57Q/sKQ7m5r/axSXavT+iua9yssnCZrvX3b73xiuvza+83AEISbHnftfZpMZP7YGIT73u6PoomY/ClWqProUPpEb0W2lwuQif6GLYmXX/+qdM/rgaHNCeGkUsNpmTm8bD2R6kx6CIeysn2IRMMiiga1qYfiukJYExxU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783591747; c=relaxed/simple; bh=VseLt84HN9pRMqSfQLuHa2XgUprH4VW97c56Y2Fc5l0=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=OWmioXaxn8qZ2yQf1yqN+jpUS2s6ciGmA8n/rle8irTaA1ozN4jIrcsTOMBv1p8k0LlVL+Snti8iCLbqS1f3WM4ZB0WljDAEJuI39kK77aGdvsiaAGO9pmjBF9yEBKMxBiKgo407j2Eol1KgUcxdBMa/DTHoJY2MDNY2zeJ2B0Q= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realsil.com.cn; spf=pass smtp.mailfrom=realsil.com.cn; dkim=pass (2048-bit key) header.d=realsil.com.cn header.i=@realsil.com.cn header.b=R4FbmQoq; arc=none smtp.client-ip=211.75.126.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realsil.com.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=realsil.com.cn Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=realsil.com.cn header.i=@realsil.com.cn header.b="R4FbmQoq" X-SpamFilter-By: ArmorX SpamTrap 5.80 with qID 669A2om062982781, This message is accepted by code: ctloc85258 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=realsil.com.cn; s=dkim; t=1783591370; bh=02qJkGoL3XQfkCurikv7zc6qI6DxSrX7y2ITegEFWvQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Transfer-Encoding:Content-Type; b=R4FbmQoqCMdXgcP5jArrzv/7s11GIO3a8Qf8b+0e1wvD62ESBaRQ6/r7ddoO6q1F2 NuEEGbQd03/FBU9HdzjqQD0fCMOqR6pTVsYIDqTfkWSINPn80SvRmoSB02nNjdfQq2 eyHssDwEho2VaH5lqGeuHxHmS29RuyYhtGFSEwRfqRvtNQRU6QhAdWpZOHS0K+p1iW JzdOGCEWYbUftVwkiRIeGcEMChnIv3fR+2Wy+XrLAn+eAY9xau2TTeasPzaK0P5HlD akZBs8D4prIZpL1kLqm97Q7Cd9hoWqxarJ4kPWs834/tTfHJhtDlRoXlxZdhQO8yl1 5zSbTN7/KuNcg== Received: from RS-EX-MBS1.realsil.com.cn ([172.29.17.101]) by rtits2.realtek.com.tw (8.15.2/3.29/5.94) with ESMTPS id 669A2om062982781 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 9 Jul 2026 18:02:50 +0800 Received: from RS-EX-MBS2.realsil.com.cn (172.29.17.102) by RS-EX-MBS1.realsil.com.cn (172.29.17.101) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Thu, 9 Jul 2026 18:02:50 +0800 Received: from 172.29.37.154 (172.29.37.152) by RS-EX-MBS2.realsil.com.cn (172.29.17.102) with Microsoft SMTP Server id 15.2.2562.17 via Frontend Transport; Thu, 9 Jul 2026 18:02:50 +0800 From: javen To: , , , , , , , , CC: , , , , , , Javen Xu Subject: [PATCH net-next v6 7/7] r8169: fix RTL8116af can not enter s0idle and c10 Date: Thu, 9 Jul 2026 18:02:36 +0800 Message-ID: <20260709100237.541-8-javen_xu@realsil.com.cn> X-Mailer: git-send-email 2.50.1.windows.1 In-Reply-To: <20260709100237.541-1-javen_xu@realsil.com.cn> References: <20260709100237.541-1-javen_xu@realsil.com.cn> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain From: Javen Xu RTL8116AF is a multi-function device. Functions 2 to 7 are hidden from the PCI core and return an all-ones response when their vendor ID is read, so they are not enumerated as normal PCI functions. However, these hidden functions can still affect platform power management. If they are left in D0 or keep ASPM disabled, the platform may fail to enter the low-power s0ix state and the CPU package may fail to enter Package C10. Put functions 2 to 7 into D3hot and enable ASPM on their PCIe link control register. Since these functions are hidden, access their configuration space through pci_bus_read_config_dword() / pci_bus_write_config_dword() using the same slot and the target function numbers. Ignore functions that return a PCI error response when reading their configuration space. Signed-off-by: Javen Xu --- Changes in v2: - no changes Changes in v3: - no changes Changes in v4: - add gate for rtl_lowpower_hidden_functions, only for RTL8116af Changes in v5: - no changes Changes in v6: - no changes --- drivers/net/ethernet/realtek/r8169_main.c | 42 +++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c index c279beb6fdb5..c0b0c2bc5a48 100644 --- a/drivers/net/ethernet/realtek/r8169_main.c +++ b/drivers/net/ethernet/realtek/r8169_main.c @@ -3771,6 +3771,42 @@ static void rtl_hw_start_8168ep_3(struct rtl8169_private *tp) r8168_mac_ocp_modify(tp, 0xe860, 0x0000, 0x0080); } +static void rtl_lowpower_hidden_functions(struct pci_dev *pdev) +{ + unsigned int slot = PCI_SLOT(pdev->devfn); + struct pci_bus *bus = pdev->bus; + int func, pos; + u16 val; + + for (func = 2; func < 8; func++) { + unsigned int devfn = PCI_DEVFN(slot, func); + + pos = pci_bus_find_capability(bus, devfn, PCI_CAP_ID_EXP); + if (pos) { + pci_bus_read_config_word(bus, devfn, pos + PCI_EXP_LNKCTL, &val); + + if (PCI_POSSIBLE_ERROR(val)) + continue; + + val |= (PCI_EXP_LNKCTL_ASPMC | PCI_EXP_LNKCTL_CLKREQ_EN); + pci_bus_write_config_word(bus, devfn, pos + PCI_EXP_LNKCTL, val); + } + + pos = pci_bus_find_capability(bus, devfn, PCI_CAP_ID_PM); + if (pos) { + pci_bus_read_config_word(bus, devfn, pos + PCI_PM_CTRL, &val); + + if (PCI_POSSIBLE_ERROR(val)) + continue; + + val &= ~PCI_PM_CTRL_STATE_MASK; + val |= PCI_D3hot; + val |= PCI_PM_CTRL_PME_STATUS; + pci_bus_write_config_word(bus, devfn, pos + PCI_PM_CTRL, val); + } + } +} + static void rtl_hw_start_8117(struct rtl8169_private *tp) { static const struct ephy_info e_info_8117[] = { @@ -5326,6 +5362,9 @@ static int rtl8169_resume(struct device *device) /* Some chip versions may truncate packets without this initialization */ rtl_init_rxcfg(tp); + if (rtl_is_8116af(tp)) + rtl_lowpower_hidden_functions(tp->pci_dev); + return rtl8169_runtime_resume(device); } @@ -6160,6 +6199,9 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) rtl8168_driver_start(tp); } + if (rtl_is_8116af(tp)) + rtl_lowpower_hidden_functions(tp->pci_dev); + if (pci_dev_run_wake(pdev)) pm_runtime_put_sync(&pdev->dev); -- 2.43.0