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(unknown [10.28.36.165]) by maili.marvell.com (Postfix) with ESMTP id E7A0B626761; Tue, 14 Jul 2026 21:12:41 -0700 (PDT) From: Ratheesh Kannoth To: , CC: , , , , , , Satha Rao , Ratheesh Kannoth Subject: [PATCH v2 net-next] octeontx2-af: add new mbox to support sync cycle on rx path Date: Wed, 15 Jul 2026 09:42:39 +0530 Message-ID: <20260715041239.2052888-1-rkannoth@marvell.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE1MDAzNSBTYWx0ZWRfX5pczTCl/xx3i K1n0vj+eUeAAXx0zT60C5hEbl/vV8dlFmp84xrASBXS6HnkLGJTeI3vL7Tc94PmBryIlDF4m22c m0vNH326Gcw39rnPxlgNfXYMLRoCQVYQ6kGfBZyqUN13O171Gc4WMcj138E3fT3ogssia0ko80+ /wQLxF5qFBKmS1m58AG0z02R0/Mkj55+LJP8oyySKwFZ+mmT2++ieLrihN5oGq6Wb0Rh5hQH0gx 9TRtpQnaEJD0KdtbWUqoqnj2D1fa05YZtyylapzNtKqUcUnSV6lQiGOvpaEqia1z4+CU0EujZuK z8slzcjnLJT6WVIO8/CyUOhGA/uig2twfnnqgLkfB/X4Ry5ONLCaE2XlP/4KNCfIgVWF7Z3PSIJ SstEOtkuHG8KiuuVRcFxeM0t0MbHEnQnJpLGSm3aJszr5yRvpnU5Jz4FyCpoA7XnLt/fMji9G3Y LZ6+7BL+AnpE9gueoJw== X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE1MDAzNSBTYWx0ZWRfX1ZkaCviUa2/d DJvfs8ePTcGHG/puHQ+mhXbctWK9j05agJriVy9jPFY7bPguhs4s/S8B2I4squ0orxuWF3P8wRX 17hv5nYBGceD1DkD76WNXPRm2O+LN0o= X-Proofpoint-GUID: UG9yTN_Yu-_hjZgTGK3DtK5Gd6gzN0RF X-Proofpoint-ORIG-GUID: UG9yTN_Yu-_hjZgTGK3DtK5Gd6gzN0RF X-Authority-Analysis: v=2.4 cv=dfCwG3Xe c=1 sm=1 tr=0 ts=6a5708be cx=c_pps a=gIfcoYsirJbf48DBMSPrZA==:117 a=gIfcoYsirJbf48DBMSPrZA==:17 a=RAioF0-LDSMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22 a=TtqV-g6YmW1Jfm2GSLaY:22 a=M5GUcnROAAAA:8 a=0F-xt6_jZRxGZ832hTMA:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-15_02,2026-07-14_01,2025-10-01_01 From: Satha Rao sync ensures that all packets that were in flight are flushed out to memory. This can be used to assist in the tearing down of an active RQ. To complete disabling RQs or disabling SMQ and its SQs, LF software send mbox to AF to complete RX_SW_SYNC. Signed-off-by: Satha Rao Signed-off-by: Ratheesh Kannoth --- .../net/ethernet/marvell/octeontx2/af/mbox.h | 1 + .../ethernet/marvell/octeontx2/af/rvu_nix.c | 20 +++++++++++++++++++ 2 files changed, 21 insertions(+) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h index f87cdf1b971d..92175de036d5 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h @@ -362,6 +362,7 @@ M(NIX_CPT_BP_ENABLE, 0x8020, nix_cpt_bp_enable, nix_bp_cfg_req, \ nix_bp_cfg_rsp) \ M(NIX_CPT_BP_DISABLE, 0x8021, nix_cpt_bp_disable, nix_bp_cfg_req, \ msg_rsp) \ +M(NIX_RX_SW_SYNC, 0x8022, nix_rx_sw_sync, msg_req, msg_rsp) \ M(NIX_READ_INLINE_IPSEC_CFG, 0x8023, nix_read_inline_ipsec_cfg, \ msg_req, nix_inline_ipsec_cfg) \ M(NIX_MCAST_GRP_CREATE, 0x802b, nix_mcast_grp_create, nix_mcast_grp_create_req, \ diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c index 78667a0977c0..47e1a4e3392b 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c @@ -273,6 +273,8 @@ static void nix_rx_sync(struct rvu *rvu, int blkaddr) { int err; + mutex_lock(&rvu->rsrc_lock); + /* Sync all in flight RX packets to LLC/DRAM */ rvu_write64(rvu, blkaddr, NIX_AF_RX_SW_SYNC, BIT_ULL(0)); err = rvu_poll_reg(rvu, blkaddr, NIX_AF_RX_SW_SYNC, BIT_ULL(0), true); @@ -289,6 +291,8 @@ static void nix_rx_sync(struct rvu *rvu, int blkaddr) err = rvu_poll_reg(rvu, blkaddr, NIX_AF_RX_SW_SYNC, BIT_ULL(0), true); if (err) dev_err(rvu->dev, "SYNC2: NIX RX software sync failed\n"); + + mutex_unlock(&rvu->rsrc_lock); } static bool is_valid_txschq(struct rvu *rvu, int blkaddr, @@ -6324,6 +6328,22 @@ int rvu_mbox_handler_nix_bandprof_get_hwinfo(struct rvu *rvu, struct msg_req *re return 0; } +int rvu_mbox_handler_nix_rx_sw_sync(struct rvu *rvu, struct msg_req *req, + struct msg_rsp *rsp) +{ + int blkaddr; + + /* NIX_AF_RX_SW_SYNC is global per NIX block; nix_rx_sync() serializes + * access under rvu->rsrc_lock across mbox and teardown paths. + */ + blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, req->hdr.pcifunc); + if (blkaddr < 0) + return NIX_AF_ERR_AF_LF_INVALID; + + nix_rx_sync(rvu, blkaddr); + return 0; +} + static struct nix_mcast_grp_elem *rvu_nix_mcast_find_grp_elem(struct nix_mcast_grp *mcast_grp, u32 mcast_grp_idx) { -- 2.43.0