From: Jiaxing Hu <gahing@gahingwoo.com>
To: Frank.Sae@motor-comm.com, andrew@lunn.ch, hkallweit1@gmail.com,
linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com,
kuba@kernel.org, pabeni@redhat.com
Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
maxime.chevallier@bootlin.com, heiko@sntech.de,
linux-rockchip@lists.infradead.org
Subject: [PATCH net-next] net: phy: motorcomm: enable the reference clock for YT8531
Date: Sun, 19 Jul 2026 15:45:55 +1200 [thread overview]
Message-ID: <20260719034555.3623003-1-gahing@gahingwoo.com> (raw)
The YT8531 needs a 25 MHz reference. On boards without a local crystal
it is fed from the SoC, described as a clock on the PHY node. Get and
enable it in probe so the PHY is clocked before its registers are
accessed. The clock is optional, so crystal-clocked boards are
unaffected.
Signed-off-by: Jiaxing Hu <gahing@gahingwoo.com>
---
This supersedes "[PATCH net-next v2] net: stmmac: dwmac-rk: ..." which
enabled the clock on the MAC side; Andrew and Maxime rightly pointed out
that the PHY is the consumer and should enable it. That series is dropped.
The DTS that consumes this (rk3576-armsom-cm5) goes to the rockchip tree
separately; the clock is optional so this patch stands alone. Tested on
an ArmSoM CM5-IO: the YT8531 links at 1000 Mbit/s.
drivers/net/phy/motorcomm.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/net/phy/motorcomm.c b/drivers/net/phy/motorcomm.c
index 708491bc1..2f85974a3 100644
--- a/drivers/net/phy/motorcomm.c
+++ b/drivers/net/phy/motorcomm.c
@@ -6,6 +6,7 @@
* Author: Frank <Frank.Sae@motor-comm.com>
*/
+#include <linux/clk.h>
#include <linux/etherdevice.h>
#include <linux/kernel.h>
#include <linux/module.h>
@@ -1169,9 +1170,20 @@ static int yt8521_probe(struct phy_device *phydev)
static int yt8531_probe(struct phy_device *phydev)
{
struct device *dev = &phydev->mdio.dev;
+ struct clk *clk;
u16 mask, val;
u32 freq;
+ /*
+ * A crystal-less YT8531 takes its 25 MHz reference from the SoC. When
+ * that reference is described as a clock, enable it for the life of the
+ * device. It is optional, so crystal-clocked boards are unaffected.
+ */
+ clk = devm_clk_get_optional_enabled(dev, NULL);
+ if (IS_ERR(clk))
+ return dev_err_probe(dev, PTR_ERR(clk),
+ "failed to get and enable the reference clock\n");
+
if (device_property_read_u32(dev, "motorcomm,clk-out-frequency-hz", &freq))
freq = YTPHY_DTS_OUTPUT_CLK_DIS;
--
2.43.0
next reply other threads:[~2026-07-19 3:46 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-19 3:45 Jiaxing Hu [this message]
2026-07-19 15:34 ` [PATCH net-next] net: phy: motorcomm: enable the reference clock for YT8531 Andrew Lunn
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