From: Leon Romanovsky <leon@kernel.org>
To: Edward Srouji <edwards@nvidia.com>
Cc: Jason Gunthorpe <jgg@ziepe.ca>,
Saeed Mahameed <saeedm@nvidia.com>,
Tariq Toukan <tariqt@nvidia.com>, Mark Bloch <mbloch@nvidia.com>,
linux-rdma@vger.kernel.org, linux-kernel@vger.kernel.org,
netdev@vger.kernel.org, Michael Guralnik <michaelgur@nvidia.com>,
Patrisious Haddad <phaddad@nvidia.com>
Subject: Re: [PATCH rdma-next] RDMA/mlx5: Deprecate latency-sensitive QPs feature
Date: Sun, 26 Jul 2026 10:37:46 +0300 [thread overview]
Message-ID: <20260726073746.GB12003@unreal> (raw)
In-Reply-To: <20260723-deprecate-lat-qps-v1-1-8bc8b8431520@nvidia.com>
On Thu, Jul 23, 2026 at 06:01:23PM +0300, Edward Srouji wrote:
> From: Michael Guralnik <michaelgur@nvidia.com>
>
> New HW no longer implements a separate class for latency-sensitive QPs and
> advertises this by a new cap bit.
> REG_UMR is the only QP that used this feature, so gate its usage of the
> feature on this cap.
>
> Signed-off-by: Michael Guralnik <michaelgur@nvidia.com>
> Reviewed-by: Patrisious Haddad <phaddad@nvidia.com>
> Signed-off-by: Edward Srouji <edwards@nvidia.com>
> ---
> drivers/infiniband/hw/mlx5/main.c | 6 +++++-
> drivers/infiniband/hw/mlx5/qp.c | 12 +++++++-----
> include/linux/mlx5/mlx5_ifc.h | 3 ++-
> 3 files changed, 14 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/infiniband/hw/mlx5/main.c b/drivers/infiniband/hw/mlx5/main.c
> index d65ebdef28234fe91ad4c24a5ded2d3af8bc646e..a0f5341f40ff1c0414939dba50301f0255825065 100644
> --- a/drivers/infiniband/hw/mlx5/main.c
> +++ b/drivers/infiniband/hw/mlx5/main.c
> @@ -4950,6 +4950,9 @@ static int mlx5_ib_stage_bfrag_init(struct mlx5_ib_dev *dev)
> if (err)
> return err;
>
> + if (MLX5_CAP_GEN(dev->mdev, qp_latency_sensitive_disable))
> + return 0;
> +
> err = mlx5_alloc_bfreg(dev->mdev, &dev->fp_bfreg, false, true);
> if (err)
> mlx5_free_bfreg(dev->mdev, &dev->bfreg);
> @@ -4959,7 +4962,8 @@ static int mlx5_ib_stage_bfrag_init(struct mlx5_ib_dev *dev)
>
> static void mlx5_ib_stage_bfrag_cleanup(struct mlx5_ib_dev *dev)
> {
> - mlx5_free_bfreg(dev->mdev, &dev->fp_bfreg);
> + if (!MLX5_CAP_GEN(dev->mdev, qp_latency_sensitive_disable))
> + mlx5_free_bfreg(dev->mdev, &dev->fp_bfreg);
> mlx5_free_bfreg(dev->mdev, &dev->bfreg);
> }
>
> diff --git a/drivers/infiniband/hw/mlx5/qp.c b/drivers/infiniband/hw/mlx5/qp.c
> index 7ff02d89c31d5b4db4c94453efafc0fce212acea..9253402ed645c9985eed098d3b21bea638028218 100644
> --- a/drivers/infiniband/hw/mlx5/qp.c
> +++ b/drivers/infiniband/hw/mlx5/qp.c
> @@ -1123,7 +1123,8 @@ static int _create_kernel_qp(struct mlx5_ib_dev *dev,
> void *qpc;
> int err;
>
> - if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR)
> + if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR &&
> + !MLX5_CAP_GEN(dev->mdev, qp_latency_sensitive_disable))
> qp->bf.bfreg = &dev->fp_bfreg;
> else
> qp->bf.bfreg = &dev->bfreg;
> @@ -2509,11 +2510,12 @@ static int create_kernel_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd,
> MLX5_SET(qpc, qpc, st, mlx5_st);
> MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED);
>
> - if (attr->qp_type != MLX5_IB_QPT_REG_UMR)
> + if (attr->qp_type == MLX5_IB_QPT_REG_UMR) {
> + if (!MLX5_CAP_GEN(dev->mdev, qp_latency_sensitive_disable))
> + MLX5_SET(qpc, qpc, latency_sensitive, 1);
> + } else {
> MLX5_SET(qpc, qpc, pd, to_mpd(pd ? pd : devr->p0)->pdn);
> - else
> - MLX5_SET(qpc, qpc, latency_sensitive, 1);
> -
> + }
>
> if (qp->flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK)
> MLX5_SET(qpc, qpc, block_lb_mc, 1);
> diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
> index 695c86ee6d7a3f15945fe7af092f63d9121da47a..28582c4d94d4335283009595f6a278c4d17c7eaa 100644
> --- a/include/linux/mlx5/mlx5_ifc.h
> +++ b/include/linux/mlx5/mlx5_ifc.h
> @@ -2005,7 +2005,8 @@ struct mlx5_ifc_cmd_hca_cap_bits {
> u8 log_max_stride_sz_rq[0x5];
> u8 reserved_at_3a8[0x3];
> u8 log_min_stride_sz_rq[0x5];
> - u8 reserved_at_3b0[0x3];
> + u8 reserved_at_3b0[0x2];
> + u8 qp_latency_sensitive_disable[0x1];
This change should be split into a separate commit.
Thanks
> u8 log_max_stride_sz_sq[0x5];
> u8 reserved_at_3b8[0x3];
> u8 log_min_stride_sz_sq[0x5];
>
> ---
> base-commit: 9b66c9af7172ffcf727214fa0ebe9a5e1ed6eb16
> change-id: 20260723-deprecate-lat-qps-ca1942227499
>
> Best regards,
> --
> Edward Srouji <edwards@nvidia.com>
>
prev parent reply other threads:[~2026-07-26 7:37 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-23 15:01 [PATCH rdma-next] RDMA/mlx5: Deprecate latency-sensitive QPs feature Edward Srouji
2026-07-26 7:37 ` Leon Romanovsky [this message]
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