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Sun, 26 Jul 2026 19:10:59 -0700 (PDT) Received: from attina.synaptics-inc.local ([199.33.119.15]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-13e53094d65sm19162200c88.13.2026.07.26.19.10.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Jul 2026 19:10:58 -0700 (PDT) From: Gavin Gao To: andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, heiko@sntech.de Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, richardcochran@gmail.com, nicolas.frattaroli@collabora.com, sebastian.reichel@collabora.com, sashal@kernel.org, alchark@gmail.com, chaoyi.chen@rock-chips.com, attinagaoxu@gmail.com, amadeus@jmu.edu.cn, rmk+kernel@armlinux.org.uk, horms@kernel.org, alok.a.tiwari@oracle.com, david.wu@rock-chips.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH net-next 0/3] net: stmmac: dwmac-rk: add RK3576 GMAC 25M refout support Date: Mon, 27 Jul 2026 10:10:44 +0800 Message-ID: <20260727021048.3375444-1-attinagaoxu@gmail.com> X-Mailer: git-send-email 2.55.0 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Hi, Some Rockchip GMAC instances can provide a 25 MHz reference clock output for an external RGMII PHY. Boards already describe the MAC clock direction with clock_in_out = "output", but the dwmac-rk driver does not currently request or enable the corresponding 25 MHz reference output clock. On RK3576, this means the REFCLKO25M_GMACx_OUT clock may be disabled by the common clock framework as unused, even though the board expects the GMAC block to provide the PHY reference clock. This series adds an optional "clk_mac_25m_refout" clock name to the Rockchip DWMAC binding, wires it up for RK3576 GMAC0/GMAC1, and enables it from the dwmac-rk driver when the MAC is configured for RGMII output clock mode. The clock remains optional, so existing device trees and SoCs are not affected. Tested on a PicoCOM RK3576 ACP board with a Motorcomm YT8521 PHY. The GMAC 25 MHz reference clock output remains active and Ethernet works. Gavin Gao (3): dt-bindings: net: rockchip-dwmac: Add 25M refout clock arm64: dts: rockchip: Add RK3576 GMAC 25M refout clocks net: stmmac: dwmac-rk: Enable RGMII 25M refout clock .../bindings/net/rockchip-dwmac.yaml | 1 + arch/arm64/boot/dts/rockchip/rk3576.dtsi | 8 ++--- .../net/ethernet/stmicro/stmmac/dwmac-rk.c | 33 ++++++++++++++++++- 3 files changed, 37 insertions(+), 5 deletions(-) -- 2.55.0