From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 44F442BE7A7; Wed, 29 Jul 2026 04:30:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785299455; cv=none; b=VEnUsBdjR1mGnSi33mhu7+varNDVnMzq+1Kuz2FA1YthqCej5qlUxMR/SB4pKL/iHBbMAMd8VnxRhejyrwf4slcuw7YsIw/oquu8PcJMOdxB1kIYy1ZVPeSnJClvM2GCZ1lvwF+lFHij4RWFZh3D5jN6UdtLRpnNoMk417LlV3Y= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785299455; c=relaxed/simple; bh=vyj9fs1HwSTP2Vn6uvDe/jTS2WMWcuAYicmd/E32dCM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=a4DIlPXSvG6Lv+ecSySTp2prIy3t8PbifI1YZCUHDf3BV84JjFzvaN91qJcB1N357n4aoROoSpKNuvY/eK+2z5pS+YqxksYlCCnOI6LF+0n/BFsOlZzJmDET+P05Zi34w2MXME83BfCl7v3u4MJ2rNffV/aKEBkGwKmghVZ9EE4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=c3dAPDck; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="c3dAPDck" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1785299454; x=1816835454; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=vyj9fs1HwSTP2Vn6uvDe/jTS2WMWcuAYicmd/E32dCM=; b=c3dAPDck0rmnBzBkiuMMVR9OAxRTjbDaIpT+MUDjCDmjTchci5YWTGXb 6aTdXc3tFJRfCTkGpcreJbC6cjXVe4zCKLgohWscqW4LGh7JzPggP91sy au/8G8OkswcUT/kVH2e5aRyJbXG1V5WKhLJfes0yWuuHYkllscQZZN7rB 2shZLJmQh+EGUR0pMcS3iR87M+3fCHBzHPgJNryj1ZXSahW1Rk71ff6Td eRH+GVZkHFv0ZTfdxufkxKgcQnwkA22W8CdIFqpF5ZX/VNDalFXqExOsr 7QBpOfSLHnnuY/1cbauQGL8CVJej8MFQwmk0VXWZWJP/oTKgwapwB11Q6 A==; X-CSE-ConnectionGUID: VgGnR1bNT+qcbukmSlH3SQ== X-CSE-MsgGUID: RcZu97WHQaC1kjQk1NPP5Q== X-IronPort-AV: E=Sophos;i="6.25,191,1779174000"; d="scan'208";a="70845767" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jul 2026 21:30:53 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.87.152) by chn-vm-ex1.mchp-main.com (10.10.87.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.43; Tue, 28 Jul 2026 21:30:52 -0700 Received: from che-ll-i67131.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Tue, 28 Jul 2026 21:30:43 -0700 From: Manikandan Muralidharan To: , , , , , , , , , , , , , , , , , , , , , , CC: Manikandan Muralidharan Subject: [PATCH v6 1/7] dt-bindings: mtd: jedec,spi-nor: allow the SFDP to be exposed via NVMEM Date: Wed, 29 Jul 2026 10:00:20 +0530 Message-ID: <20260729043026.1811147-2-manikandan.m@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260729043026.1811147-1-manikandan.m@microchip.com> References: <20260729043026.1811147-1-manikandan.m@microchip.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Add an optional "sfdp" child node (compatible "jedec,sfdp") that describes the SFDP as a read-only NVMEM provider via nvmem.yaml, so its contents (e.g. a vendor EUI-48/EUI-64) can be read through NVMEM cells. Reviewed-by: Linus Walleij Signed-off-by: Manikandan Muralidharan --- .../devicetree/bindings/mtd/jedec,spi-nor.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml index 587af4968255..98fd954598ab 100644 --- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml +++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml @@ -103,6 +103,20 @@ properties: spi-cpol: true spi-cpha: true + sfdp: + $ref: /schemas/nvmem/nvmem.yaml# + unevaluatedProperties: false + description: + The Serial Flash Discoverable Parameters (SFDP) tables exposed as a + read-only NVMEM device. This allows standard or vendor-specific SFDP + data (for example a factory-programmed EUI-48/EUI-64 identifier) to be + consumed through NVMEM cells. + properties: + compatible: + const: jedec,sfdp + required: + - compatible + dependencies: spi-cpol: [ spi-cpha ] spi-cpha: [ spi-cpol ] @@ -122,6 +136,10 @@ examples: spi-max-frequency = <40000000>; m25p,fast-read; reset-gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + + sfdp { + compatible = "jedec,sfdp"; + }; }; }; ... -- 2.43.0