From: Tariq Toukan <tariqt@nvidia.com>
To: Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, <netdev@vger.kernel.org>,
Paolo Abeni <pabeni@redhat.com>,
Sabrina Dubroca <sd@queasysnail.net>
Cc: Aleksandr Loktionov <aleksandr.loktionov@intel.com>,
Alexei Lazar <alazar@nvidia.com>,
Boris Pismenny <borisp@nvidia.com>,
Carolina Jubran <cjubran@nvidia.com>, Chris Mi <cmi@nvidia.com>,
Cosmin Ratiu <cratiu@nvidia.com>,
Daniel Zahka <daniel.zahka@gmail.com>,
Doruk Tan Ozturk <doruk@0sec.ai>,
Dragos Tatulea <dtatulea@nvidia.com>,
Gal Pressman <gal@nvidia.com>,
Jacob Keller <Jacob.e.keller@intel.com>,
Jianbo Liu <jianbol@nvidia.com>, Kees Cook <kees@kernel.org>,
Lama Kayal <lkayal@nvidia.com>, Leon Romanovsky <leon@kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-kselftest@vger.kernel.org>,
<linux-rdma@vger.kernel.org>, Mark Bloch <mbloch@nvidia.com>,
"Patrisious Haddad" <phaddad@nvidia.com>,
Raed Salem <raeds@nvidia.com>,
Rahul Rameshbabu <rrameshbabu@nvidia.com>,
Saeed Mahameed <saeedm@nvidia.com>, Shuah Khan <shuah@kernel.org>,
Shuah Khan <skhan@linuxfoundation.org>,
Simon Horman <horms@kernel.org>,
Stanislav Fomichev <sdf@fomichev.me>,
Stanislav Fomichev <sdf.kernel@gmail.com>,
Tariq Toukan <tariqt@nvidia.com>
Subject: [PATCH net-next 05/13] net/mlx5e: psp: Move RX marker from ft_metadata to flow_tag
Date: Thu, 30 Jul 2026 12:17:47 +0300 [thread overview]
Message-ID: <20260730091756.2543777-6-tariqt@nvidia.com> (raw)
In-Reply-To: <20260730091756.2543777-1-tariqt@nvidia.com>
From: Cosmin Ratiu <cratiu@nvidia.com>
Move PSP RX marker from ft_metadata (set via modify_hdr action) to
flow_tag (set via flow_context). This frees ft_metadata for storing
SPI for future decapsulated PSP packets.
All mlx5e accel protos have to move to avoid misinterpreting packets
with high bits of ft_metadata as IPsec or Macsec. This patch is the
first step, defining a new header, bit layout and macros.
Signed-off-by: Cosmin Ratiu <cratiu@nvidia.com>
Reviewed-by: Dragos Tatulea <dtatulea@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
---
.../mellanox/mlx5/core/en_accel/flow_tag.h | 35 +++++++++++++++++++
.../mellanox/mlx5/core/en_accel/psp.c | 34 ++++--------------
.../mellanox/mlx5/core/en_accel/psp_rxtx.h | 10 +++---
3 files changed, 47 insertions(+), 32 deletions(-)
create mode 100644 drivers/net/ethernet/mellanox/mlx5/core/en_accel/flow_tag.h
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/flow_tag.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/flow_tag.h
new file mode 100644
index 000000000000..67f048ff7afe
--- /dev/null
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/flow_tag.h
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
+/* Copyright (c) 2026, NVIDIA CORPORATION & AFFILIATES. All rights reserved. */
+
+#ifndef __MLX5E_FLOW_TAG_H__
+#define __MLX5E_FLOW_TAG_H__
+
+#include <linux/bits.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/mlx5/device.h>
+
+/* Unified accel flow_tag layout in CQE sop_drop_qpn [23:0]:
+ *
+ * [23:21] = protocol ID (3 bits):
+ * 0 = none (default)
+ * 3 = PSP (HW decrypted, PSP header present)
+ * 1,2,4-7 = reserved
+ * [20:16] = reserved
+ * [15:0] = used by other subsystems (e.g. TC).
+ */
+#define MLX5E_ACCEL_FLOW_TAG_PROTO_MASK GENMASK(23, 21)
+#define MLX5E_ACCEL_FLOW_TAG_PROTO_NONE (0 << 21)
+#define MLX5E_ACCEL_FLOW_TAG_PROTO_PSP (3 << 21)
+
+static inline u32 mlx5e_accel_flow_tag(struct mlx5_cqe64 *cqe)
+{
+ return be32_to_cpu(cqe->sop_drop_qpn) & 0xFFFFFF;
+}
+
+static inline u32 mlx5e_accel_flow_tag_proto(struct mlx5_cqe64 *cqe)
+{
+ return mlx5e_accel_flow_tag(cqe) & MLX5E_ACCEL_FLOW_TAG_PROTO_MASK;
+}
+
+#endif /* __MLX5E_FLOW_TAG_H__ */
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp.c
index 6cc4b9d54f6e..ca5bb60f6d16 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp.c
@@ -8,6 +8,7 @@
#include "lib/crypto.h"
#include "en_accel/en_accel.h"
#include "en_accel/psp.h"
+#include "en_accel/psp_rxtx.h"
#include "fs_core.h"
enum accel_fs_psp_type {
@@ -42,7 +43,6 @@ struct mlx5e_psp_rx_decrypt_table {
struct mlx5_flow_table *ft;
struct mlx5_flow_group *miss_group;
struct mlx5_flow_handle *miss_rule;
- struct mlx5_modify_hdr *rx_modify_hdr;
struct mlx5_flow_handle *rule;
};
@@ -408,10 +408,6 @@ accel_psp_fs_rx_decrypt_ft_destroy(struct mlx5e_psp_fs *fs,
struct mlx5e_psp_rx_decrypt_table *decrypt)
{
accel_psp_fs_del_flow_rule(&decrypt->rule);
- if (decrypt->rx_modify_hdr) {
- mlx5_modify_header_dealloc(fs->mdev, decrypt->rx_modify_hdr);
- decrypt->rx_modify_hdr = NULL;
- }
accel_psp_fs_del_flow_rule(&decrypt->miss_rule);
accel_psp_fs_destroy_flow_group(&decrypt->miss_group);
accel_psp_fs_destroy_ft(&decrypt->ft);
@@ -431,8 +427,6 @@ accel_psp_fs_rx_decrypt_ft_create(struct mlx5e_psp_fs *fs,
struct mlx5e_psp_rx_decrypt_table *decrypt,
struct mlx5_flow_destination *default_dest)
{
- u8 action[MLX5_UN_SZ_BYTES(set_add_copy_action_in_auto)] = {};
- struct mlx5_modify_hdr *modify_hdr = NULL;
struct mlx5_flow_table_attr ft_attr = {};
struct mlx5_flow_destination dest = {};
struct mlx5_core_dev *mdev = fs->mdev;
@@ -482,28 +476,14 @@ accel_psp_fs_rx_decrypt_ft_create(struct mlx5e_psp_fs *fs,
/* Add PSP RX decrypt rule */
setup_fte_udp_psp(spec, PSP_DEFAULT_UDP_PORT);
- flow_act.crypto.type = MLX5_FLOW_CONTEXT_ENCRYPT_DECRYPT_TYPE_PSP;
- /* Set bit[31, 30] PSP marker */
-#define MLX5E_PSP_MARKER_BIT (BIT(30) | BIT(31))
- MLX5_SET(set_action_in, action, action_type, MLX5_ACTION_TYPE_SET);
- MLX5_SET(set_action_in, action, field, MLX5_ACTION_IN_FIELD_METADATA_REG_B);
- MLX5_SET(set_action_in, action, data, MLX5E_PSP_MARKER_BIT);
- MLX5_SET(set_action_in, action, offset, 0);
- MLX5_SET(set_action_in, action, length, 32);
-
- modify_hdr = mlx5_modify_header_alloc(mdev, MLX5_FLOW_NAMESPACE_KERNEL, 1, action);
- if (IS_ERR(modify_hdr)) {
- err = PTR_ERR(modify_hdr);
- mlx5_core_err(mdev, "fail to alloc psp set modify_header_id err=%d\n", err);
- modify_hdr = NULL;
- goto out_err;
- }
- decrypt->rx_modify_hdr = modify_hdr;
+ /* Set PSP marker via flow_tag */
+ spec->flow_context.flags = FLOW_CONTEXT_HAS_TAG;
+ spec->flow_context.flow_tag = MLX5E_ACCEL_FLOW_TAG_PROTO_PSP;
+
+ flow_act.crypto.type = MLX5_FLOW_CONTEXT_ENCRYPT_DECRYPT_TYPE_PSP;
flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
- MLX5_FLOW_CONTEXT_ACTION_CRYPTO_DECRYPT |
- MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
- flow_act.modify_hdr = modify_hdr;
+ MLX5_FLOW_CONTEXT_ACTION_CRYPTO_DECRYPT;
dest.type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
dest.ft = fs->check.ft;
rule = mlx5_add_flow_rules(decrypt->ft, spec, &flow_act, &dest, 1);
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.h
index 2b080c39cc37..a26faf7cfc27 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.h
@@ -9,10 +9,7 @@
#include <net/psp.h>
#include "en.h"
#include "en/txrx.h"
-
-/* Bit30: PSP marker, Bit22-0: PSP obj id */
-#define MLX5_PSP_METADATA_MARKER(metadata) ((((metadata) >> 30) & 0x3) == 0x3)
-#define MLX5_PSP_METADATA_HANDLE(metadata) ((metadata) & GENMASK(22, 0))
+#include "en_accel/flow_tag.h"
struct mlx5e_accel_tx_psp_state {
u32 tailen;
@@ -82,7 +79,10 @@ static inline unsigned int mlx5e_psp_tx_ids_len(struct mlx5e_accel_tx_psp_state
static inline bool mlx5e_psp_is_rx_flow(struct mlx5_cqe64 *cqe)
{
- return MLX5_PSP_METADATA_MARKER(be32_to_cpu(cqe->ft_metadata));
+ u32 proto = mlx5e_accel_flow_tag_proto(cqe);
+
+ return proto == MLX5E_ACCEL_FLOW_TAG_PROTO_PSP;
+
}
bool mlx5e_psp_offload_handle_rx_skb(struct net_device *netdev, struct sk_buff *skb,
--
2.44.0
next prev parent reply other threads:[~2026-07-30 9:19 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-30 9:17 [PATCH net-next 00/13] net/mlx5e: Add support for HW-GRO to PSP Tariq Toukan
2026-07-30 9:17 ` [PATCH net-next 01/13] net/mlx5e: Generalize TC <-> IPsec mutual exclusion Tariq Toukan
2026-07-30 9:17 ` [PATCH net-next 02/13] net/mlx5e: ipsec: Block TC offload when IPsec is enabled Tariq Toukan
2026-07-30 9:17 ` [PATCH net-next 03/13] net/mlx5e: psp: Block TC offload when PSP " Tariq Toukan
2026-07-30 9:17 ` [PATCH net-next 04/13] net/mlx5e: macsec: Block TC offload when MACsec " Tariq Toukan
2026-07-30 9:17 ` Tariq Toukan [this message]
2026-07-30 9:17 ` [PATCH net-next 06/13] net/mlx5e: ipsec: Move RX marker from ft_metadata to flow_tag Tariq Toukan
2026-07-30 9:17 ` [PATCH net-next 07/13] net/mlx5e: macsec: " Tariq Toukan
2026-07-30 9:17 ` [PATCH net-next 08/13] net/mlx5e: psp: Handle HW-decapsulated RX PSP packets Tariq Toukan
2026-07-30 9:17 ` [PATCH net-next 09/13] net/mlx5e: psp: Add an rx_decap steering table Tariq Toukan
2026-07-30 9:17 ` [PATCH net-next 10/13] net/mlx5e: shampo: Flush session on PSP mismatch Tariq Toukan
2026-07-30 9:17 ` [PATCH net-next 11/13] net/mlx5e: psp: Dynamically reconfigure based on SHAMPO mode Tariq Toukan
2026-07-30 9:17 ` [PATCH net-next 12/12] net: psp: Add a self test for PSP with HW-GRO Tariq Toukan
2026-07-30 9:58 ` Tariq Toukan
2026-07-30 9:17 ` [PATCH net-next 12/13] selftests: drv-net: psp: Fix responder parsing Tariq Toukan
2026-07-30 9:17 ` [PATCH net-next 13/13] selftests: drv-net: psp: Add a test for PSP with HW-GRO Tariq Toukan
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