From: Jiaxing Hu <gahing@gahingwoo.com>
To: Frank.Sae@motor-comm.com, andrew@lunn.ch, hkallweit1@gmail.com,
linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com,
kuba@kernel.org, pabeni@redhat.com
Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
maxime.chevallier@bootlin.com, heiko@sntech.de,
linux-rockchip@lists.infradead.org, attinagaoxu@gmail.com,
alchark@gmail.com
Subject: [PATCH net-next v4] net: phy: motorcomm: enable the reference clock for YT8521
Date: Fri, 31 Jul 2026 13:38:07 +1200 [thread overview]
Message-ID: <20260731013807.1488843-1-gahing@gahingwoo.com> (raw)
Commit 42310a24389c ("net: phy: motorcomm: Enable optional clock for
YT8531") enables the SoC-provided reference clock for the YT8531 in its
probe. The YT8521 has the same need on crystal-less boards but goes
through yt8521_probe(), so enable it there too. The clock is optional,
so crystal-clocked boards are unaffected.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Gavin Gao <attinagaoxu@gmail.com>
Signed-off-by: Jiaxing Hu <gahing@gahingwoo.com>
---
Changes in v4:
- Rebased on net-next/main (Jakub Kicinski). The YT8531 clock enable
landed meanwhile as 42310a24389c, so v4 now only adds the YT8521 path;
the include and the yt8531 change are already upstream. No helper, per
Andrew's and Alexey's preference on v3.
v1..v3 history:
- v1 https://lore.kernel.org/all/20260719034555.3623003-1-gahing@gahingwoo.com/ (YT8531; superseded upstream by 42310a24389c)
- v2 https://lore.kernel.org/all/20260727205602.1188008-1-gahing@gahingwoo.com/ (added YT8521 via a helper)
- v3 https://lore.kernel.org/all/20260728055659.1211459-1-gahing@gahingwoo.com/ (open-coded)
Tested by Gavin Gao on a PicoCOM RK3576 board with a YT8521.
drivers/net/phy/motorcomm.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/phy/motorcomm.c b/drivers/net/phy/motorcomm.c
index 3396a38..c5a2cda 100644
--- a/drivers/net/phy/motorcomm.c
+++ b/drivers/net/phy/motorcomm.c
@@ -1065,6 +1065,7 @@ static int yt8521_probe(struct phy_device *phydev)
{
struct device *dev = &phydev->mdio.dev;
struct yt8521_priv *priv;
+ struct clk *clk;
int chip_config;
u16 mask, val;
u32 freq;
@@ -1076,6 +1077,11 @@ static int yt8521_probe(struct phy_device *phydev)
phydev->priv = priv;
+ clk = devm_clk_get_optional_enabled(dev, NULL);
+ if (IS_ERR(clk))
+ return dev_err_probe(dev, PTR_ERR(clk),
+ "failed to get and enable PHY clock\n");
+
chip_config = ytphy_read_ext_with_lock(phydev, YT8521_CHIP_CONFIG_REG);
if (chip_config < 0)
return chip_config;
--
2.43.0
reply other threads:[~2026-07-31 1:38 UTC|newest]
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