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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Russell King , , , Maxime Chevallier , Vladimir Oltean , Christophe Roullier CC: , , , Subject: [PATCH 3/4] arm64: dts: st: increase deassert of PHY reset in stm32mp257f-ev1 Date: Tue, 4 Aug 2026 15:20:51 +0200 Message-ID: <20260804132052.205273-4-christophe.roullier@foss.st.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260804132052.205273-1-christophe.roullier@foss.st.com> References: <20260804132052.205273-1-christophe.roullier@foss.st.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: ENXCAS1NODE2.st.com (10.75.128.138) To STKDAG1NODE2.st.com (10.75.128.133) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM4PEPF00027A6C:EE_|PAWPR10MB7792:EE_ X-MS-Office365-Filtering-Correlation-Id: 6b09388b-d8ac-4d90-7c68-08def22b3d13 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|82310400026|36860700016|23010399003|56012099006|11063799006|10067099003|18002099003|22082099003|921020; X-Microsoft-Antispam-Message-Info: jCMDOQ/wcnOvNgSB8ew4FJaxmgoUH7GNCDWomFq7qj9TUDftZtQaLKlXH9IllCkxz5r2MUV9i/3RsTjIbHLwk75y/TbJQ/4WgCEMSlcR4sCajp+VNA0CKBKqTTonPFZTfRO3TvX/21uF4rnP+6wzfOtOagqgbOgtZzIMU2gcYyPog4QaztwrdPEirTHZOJeGQlLp2lb0cvapjBVgtOuyI+K8VjIqBA2fCikeqzraWivF0rJ+ZLHCoJpkbO2iulZdoKhgMMwuRu7wU34ct4p3hddFmQkm2E+9Ba0swshvYgPVJTR/MchPwxbEFqllwzRKKOI7CTQuR8ji977Q2Mv8SiTKITteH4sNsC6p1ZbHge0pWAzH4qvREYVsrKmBaELA3r/PRBR0KZdGRxC/6eksUEpDF7gwwu7bVtRT3oefpMyaLZFkPiLCfggPMgbawNeabffc4XnHPaZ24XnEGVpVv1nxf0sKtmdaqyewoY6pzC9cdJNEYSWaGUlyY+yTU/kY3xQjJMMQIooTsl/wtbRT13y6ewR3L8mqUW3/6nWF37fzukFAD0uheclg89Jp4Og9kVpwvtPnmnC+wasfzdPVriPluH4TmU+5fuqqfpcZ5aN06i+0q+Ps6qsXeKpRZSPfrKt+RswWpMkPNhDScJm86q5jx910llwRw9nCNgyZZFmhQ+EliEVIUKtmT5ZFqktlTv+MlYhLAaU//RYCLnWa2FapsGZHc4Ns5zBJEraLt++0tmfWpBXOjdJHk29g3wP2 X-Forefront-Antispam-Report: CIP:164.130.1.59;CTRY:IT;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:smtpO365.st.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(7416014)(1800799024)(82310400026)(36860700016)(23010399003)(56012099006)(11063799006)(10067099003)(18002099003)(22082099003)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: OcKSYVRrBXXJ217Bi0A4RQ9NDRkuIgNKGDgQmx+zNj+mteXiCckyuU0ORmT1uuF3d+79BiXdXJTY4wnpQnXo37yrzmULOxgpxGmmIkW45vF7d91ZODPSrJelNLwmSpSTSm6mqcrUl4aBQWHmJoHEbHNJAWtvL1Aj0Uf7D3qKkd5AyOBjotbSTxxT2XkgrXwve6hyfcbIGoqJm4xF838mnjkCw2jS8Ow7aDMQ7QYGXK6zTFFh9TEfI2ARVQUZXJnIl4aLST5uU2vdkWcFQ+23/99sXWuEcdO0APpBiJknKZky6fuaAXj5VNAkJQxrmRQG70ZHI69HGheiykMPI/LIp4DVlHUftMyswHAdXsXEm6zyL7o33EEThr8o76flPtLbgVS7xuJmujsoEgcOkhNCozrVR/CB7clzbzBvM0d3Kb0wiahbi/cIGVWtstuuH+B5 X-OriginatorOrg: foss.st.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Aug 2026 13:21:05.4592 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6b09388b-d8ac-4d90-7c68-08def22b3d13 X-MS-Exchange-CrossTenant-Id: 75e027c9-20d5-47d5-b82f-77d7cd041e8f X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=75e027c9-20d5-47d5-b82f-77d7cd041e8f;Ip=[164.130.1.59];Helo=[smtpO365.st.com] X-MS-Exchange-CrossTenant-AuthSource: AM4PEPF00027A6C.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAWPR10MB7792 The RTL8211F has a PHYRSTB pin to reset the chip. For a complete PHY reset, this pin must be asserted low for at least 10ms for the internal regulator. Wait for at least 80ms (for internal circuits setting time) before accessing the PHY register. All registers will return to default values after a hardware reset Signed-off-by: Christophe Roullier --- arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts index 14e033f365e3..a41ab55aa8cb 100644 --- a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts +++ b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts @@ -247,7 +247,7 @@ phy0_eth2: ethernet-phy@1 { compatible = "ethernet-phy-id001c.c916"; reg = <1>; reset-assert-us = <10000>; - reset-deassert-us = <300>; + reset-deassert-us = <80000>; reset-gpios = <&gpiog 6 GPIO_ACTIVE_LOW>; }; }; -- 2.43.0