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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue Cc: Daniel Thompson , Alex Elder , Davide Caratti , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, Lorenzo Bianconi X-Mailer: b4 0.14.3 X-Proofpoint-Spam-Info: AW1haW4tMjYwODA3MDA2NCBTYWx0ZWRfX11jsB9ccXe6T 3am67MHUGF5op1lJ9LimupuZC3axKT8CXfQILx9SY9zTxcSSDlzzA6lGVMHo0ut+2aQ6SuA4i0U rJbXt0YBYdTc5VSkmE29Dcy4dHS29Dw= X-Authority-Analysis: v=2.4 cv=PK0/P/qC c=1 sm=1 tr=0 ts=6a759a64 cx=c_pps a=JbAStetqSzwMeJznSMzCyw==:117 a=WpTaRW6qxYHRGzLzQsVYzg==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=P-IC7800AAAA:8 a=EUspDBNiAAAA:8 a=D5QsTFb32KIK1CFUdN4A:9 a=QEXdDO2ut3YA:10 a=uxP6HrT_eTzRwkO_Te1X:22 a=d3PnA9EDa4IxuAV0gXij:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODA3MDA2NCBTYWx0ZWRfX3nvQ9GxM7Q17 UB6Py/l45bwXcNtN87XELsSSmpKdAte24HkzSjE7sjj3Ud9nSgglzEhSPqHGoXtJfdBVL73avkm NMm4Al8brP9LdQw27hdVi2LjgVrA+J7y2VXUA2zxq35eIPRrIM0itcXN8w4keSjvbUZZ4W/jdI4 /Bn+cSrZeZd+Ls4EfgsmoAUZeWa6LgaF5QygV9R+/LIEhl3RV/T2HoNh9HnZ7cM0SaLyaq2mBcT y8nBn7p2FHey4BgvuJT5EQaSdQLZGh/x9H1qA3y+Kgz+ckF44MgyUU77ybhZ01+wgnoM5ZuOxOu tYuU6t2XV24tZv4oE0tY71TBvKLC1SEJkH46WXLLk8VCdEF49i/AI6qRSeWU33GiH6BpiVp2ozL zmxAvkXOQSErdydqsiki3SECyszpYYRgKBiF6FbSjkbXv7YIQwEs61GWt0tlTrC6IG7Ak8jtu56 TQBHzF1PIkAK6CS8T9A== X-Proofpoint-GUID: XWIls_GdsKm1CvvrivngnPcbIl8TeqfZ X-Proofpoint-ORIG-GUID: XWIls_GdsKm1CvvrivngnPcbIl8TeqfZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-07_01,2026-08-06_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 bulkscore=0 adultscore=0 phishscore=0 malwarescore=0 impostorscore=0 spamscore=0 suspectscore=0 priorityscore=1501 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608070064 Implement offload of the tc-ets qdisc in the stmmac driver. The number of ETS bands cannot exceed the number of TX queues, and strict priority bands (zero quanta) are rejected, since sched prio is not implemented in the ETS offload but will be implemented in the mqprio qdisc offload. Weighted bands whose weight is zero are rejected as well, since MTL DWRR would never schedule traffic on them. The requested weights are applied to the TX queues and the MTL scheduler is switched to DWRR. The TC_ETS_GRAFT command is not offloaded and falls back to the software implementation, and TC_ETS_STATS is accepted while the ETS qdisc is offloaded but no hardware statistics are provided. Export stmmac_set_tx_queue_weight() so the ETS path can reprogram queue weights, and wire TC_SETUP_QDISC_ETS into stmmac_setup_tc(). Destroying the ETS qdisc restores the devicetree configured scheduling algorithm and TX queue weights. Reviewed-by: Maxime Chevallier Signed-off-by: Lorenzo Bianconi --- drivers/net/ethernet/stmicro/stmmac/hwif.h | 4 ++ drivers/net/ethernet/stmicro/stmmac/stmmac.h | 6 ++ drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 22 +++++-- drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c | 78 +++++++++++++++++++++++ 4 files changed, 105 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.h b/drivers/net/ethernet/stmicro/stmmac/hwif.h index 04dafec021b4..b70883a53b09 100644 --- a/drivers/net/ethernet/stmicro/stmmac/hwif.h +++ b/drivers/net/ethernet/stmicro/stmmac/hwif.h @@ -580,6 +580,8 @@ struct stmmac_tc_ops { struct tc_taprio_qopt_offload *qopt); int (*setup_etf)(struct stmmac_priv *priv, struct tc_etf_qopt_offload *qopt); + int (*setup_ets)(struct stmmac_priv *priv, + struct tc_ets_qopt_offload *qopt); int (*query_caps)(struct stmmac_priv *priv, struct tc_query_caps_base *base); int (*setup_mqprio)(struct stmmac_priv *priv, @@ -598,6 +600,8 @@ struct stmmac_tc_ops { stmmac_do_callback(__priv, tc, setup_taprio, __args) #define stmmac_tc_setup_etf(__priv, __args...) \ stmmac_do_callback(__priv, tc, setup_etf, __args) +#define stmmac_tc_setup_ets(__priv, __args...) \ + stmmac_do_callback(__priv, tc, setup_ets, __args) #define stmmac_tc_query_caps(__priv, __args...) \ stmmac_do_callback(__priv, tc, query_caps, __args) #define stmmac_tc_setup_mqprio(__priv, __args...) \ diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h index 8ba8f03e1ce0..823b40212233 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h @@ -301,6 +301,11 @@ struct stmmac_priv { /* Protect est parameters */ struct mutex est_lock; struct stmmac_est *est; + struct { + bool enable; + u8 algo; + u32 quanta[MTL_MAX_TX_QUEUES]; + } qdisc; struct dma_features dma_cap; struct stmmac_counters mmc; int hw_cap_support; @@ -394,6 +399,7 @@ enum stmmac_state { extern const struct dev_pm_ops stmmac_simple_pm_ops; +void stmmac_set_tx_queue_weight(struct stmmac_priv *priv); int stmmac_mdio_unregister(struct net_device *ndev); int stmmac_mdio_register(struct net_device *ndev); int stmmac_mdio_reset(struct mii_bus *mii); diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index c729ab127afd..7d1473fbde54 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -3419,14 +3419,18 @@ static void stmmac_set_rings_length(struct stmmac_priv *priv) * @priv: driver private structure * Description: It is used for setting TX queues weight */ -static void stmmac_set_tx_queue_weight(struct stmmac_priv *priv) +void stmmac_set_tx_queue_weight(struct stmmac_priv *priv) { u8 tx_queues_count = priv->plat->tx_queues_to_use; u32 weight; u8 queue; for (queue = 0; queue < tx_queues_count; queue++) { - weight = priv->plat->tx_queues_cfg[queue].weight; + if (priv->qdisc.enable && + priv->qdisc.algo == MTL_TX_ALGORITHM_DWRR) + weight = priv->qdisc.quanta[queue]; + else + weight = priv->plat->tx_queues_cfg[queue].weight; stmmac_set_mtl_tx_queue_weight(priv, priv->hw, weight, queue); } } @@ -3570,9 +3574,15 @@ static void stmmac_mtl_configuration(struct stmmac_priv *priv) priv->plat->rx_sched_algorithm); /* Configure MTL TX algorithms */ - if (tx_queues_count > 1) - stmmac_prog_mtl_tx_algorithms(priv, priv->hw, - priv->plat->tx_sched_algorithm); + if (tx_queues_count > 1) { + u8 tx_sched_algo; + + if (priv->qdisc.enable) + tx_sched_algo = priv->qdisc.algo; + else + tx_sched_algo = priv->plat->tx_sched_algorithm; + stmmac_prog_mtl_tx_algorithms(priv, priv->hw, tx_sched_algo); + } /* Configure CBS in AVB TX queues */ if (tx_queues_count > 1) @@ -6428,6 +6438,8 @@ static int stmmac_setup_tc(struct net_device *ndev, enum tc_setup_type type, return stmmac_tc_setup_taprio(priv, priv, type_data); case TC_SETUP_QDISC_ETF: return stmmac_tc_setup_etf(priv, priv, type_data); + case TC_SETUP_QDISC_ETS: + return stmmac_tc_setup_ets(priv, priv, type_data); default: return -EOPNOTSUPP; } diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c index 14cabe76e53e..5dcd18b5808e 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c @@ -1210,6 +1210,82 @@ static int tc_setup_etf(struct stmmac_priv *priv, return 0; } +/* Max quantum value supported by the MTL DWRR scheduler */ +#define MTL_TXQ_WEIGHT_QUANTUM_MAX 0x1312d0 + +static void stmmac_qdisc_restore_dt_config(struct stmmac_priv *priv) +{ + /* reset to the dt configured algorithm. */ + priv->qdisc.enable = false; + stmmac_set_tx_queue_weight(priv); + stmmac_prog_mtl_tx_algorithms(priv, priv->hw, + priv->plat->tx_sched_algorithm); +} + +static int tc_setup_ets_sched(struct stmmac_priv *priv, + struct tc_ets_qopt_offload *qopt) +{ + struct tc_ets_qopt_offload_replace_params *p = &qopt->replace_params; + struct plat_stmmacenet_data *pdata = priv->plat; + int i; + + if (qopt->parent != TC_H_ROOT) + goto error; + + if (p->bands > pdata->tx_queues_to_use) + goto error; + + for (i = 0; i < pdata->tx_queues_to_use; i++) { + u32 quantum = 0; + + if (pdata->tx_queues_cfg[i].mode_to_use == MTL_QUEUE_AVB) + goto error; + + if (i < p->bands) { + if (!p->quanta[i]) + goto error; + + if (p->quanta[i] > MTL_TXQ_WEIGHT_QUANTUM_MAX) + goto error; + + quantum = p->quanta[i]; + } + + priv->qdisc.quanta[i] = quantum; + stmmac_set_mtl_tx_queue_weight(priv, priv->hw, quantum, i); + } + + stmmac_prog_mtl_tx_algorithms(priv, priv->hw, MTL_TX_ALGORITHM_DWRR); + priv->qdisc.algo = MTL_TX_ALGORITHM_DWRR; + priv->qdisc.enable = true; + + return 0; +error: + stmmac_qdisc_restore_dt_config(priv); + return -EOPNOTSUPP; +} + +static int tc_setup_ets(struct stmmac_priv *priv, + struct tc_ets_qopt_offload *qopt) +{ + switch (qopt->command) { + case TC_ETS_REPLACE: + return tc_setup_ets_sched(priv, qopt); + case TC_ETS_DESTROY: + stmmac_qdisc_restore_dt_config(priv); + break; + case TC_ETS_STATS: + if (priv->qdisc.enable && + priv->qdisc.algo == MTL_TX_ALGORITHM_DWRR) + break; + fallthrough; + default: + return -EOPNOTSUPP; + } + + return 0; +} + static int tc_query_caps(struct stmmac_priv *priv, struct tc_query_caps_base *base) { @@ -1308,6 +1384,7 @@ const struct stmmac_tc_ops dwmac4_tc_ops = { .setup_cls = tc_setup_cls, .setup_taprio = tc_setup_taprio_without_fpe, .setup_etf = tc_setup_etf, + .setup_ets = tc_setup_ets, .query_caps = tc_query_caps, .setup_mqprio = tc_setup_mqprio_unimplemented, }; @@ -1319,6 +1396,7 @@ const struct stmmac_tc_ops dwmac510_tc_ops = { .setup_cls = tc_setup_cls, .setup_taprio = tc_setup_taprio, .setup_etf = tc_setup_etf, + .setup_ets = tc_setup_ets, .query_caps = tc_query_caps, .setup_mqprio = tc_setup_dwmac510_mqprio, }; -- 2.55.0