From: Abid Ali <dev.taqnialabs@gmail.com>
To: Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>,
Paolo Abeni <pabeni@redhat.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Russell King <linux@armlinux.org.uk>,
Qingfang Deng <qingfang.deng@linux.dev>,
Maxime Chevallier <maxime.chevallier@bootlin.com>
Cc: netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Abid Ali <dev.taqnialabs@gmail.com>
Subject: [PATCH net-next v4 1/3] net: stmmac: enable MAC rx/tx after DMA start
Date: Fri, 14 Aug 2026 06:07:53 +0000 [thread overview]
Message-ID: <20260814-stmmac-rx-fifo-block-v4-1-1951fd3d33b7@gmail.com> (raw)
In-Reply-To: <20260814-stmmac-rx-fifo-block-v4-0-1951fd3d33b7@gmail.com>
When the MAC receiver is enabled before the DMA channels are started,
incoming frames fill the MTL FIFO with no DMA engine to drain it.
If the PHY/Switch is already up at this point, and there is inflow
of packets towards EMAC, the per-queue FIFO overflows within this window.
Once the FIFO is full, the MTL read controller goes idle and never
retries delivery even if the DMA comes alive later on.
This behaviour happens due to enabling the MAC RX path before
the DMA setup is ready, and any delay between these events increases
the chances of blocking the rx path permanently.
The EMAC should only accept packets after the DMAs are enabled.
Signed-off-by: Abid Ali <dev.taqnialabs@gmail.com>
---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index b2b7d0242dd3..b9d5d4aabf42 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -3685,9 +3685,6 @@ static int stmmac_hw_setup(struct net_device *dev)
priv->hw->rx_csum = 0;
}
- /* Enable the MAC Rx/Tx */
- stmmac_mac_set(priv, priv->ioaddr, true);
-
/* Set the HW DMA mode and the COE */
stmmac_dma_operation_mode(priv);
@@ -3743,6 +3740,9 @@ static int stmmac_hw_setup(struct net_device *dev)
/* Start the ball rolling... */
stmmac_start_all_dma(priv);
+ /* Enable the MAC Rx/Tx */
+ stmmac_mac_set(priv, priv->ioaddr, true);
+
phylink_rx_clk_stop_block(priv->phylink);
stmmac_set_hw_vlan_mode(priv, priv->hw);
phylink_rx_clk_stop_unblock(priv->phylink);
@@ -7184,12 +7184,12 @@ int stmmac_xdp_open(struct net_device *dev)
hrtimer_setup(&tx_q->txtimer, stmmac_tx_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
}
- /* Enable the MAC Rx/Tx */
- stmmac_mac_set(priv, priv->ioaddr, true);
-
/* Start Rx & Tx DMA Channels */
stmmac_start_all_dma(priv);
+ /* Enable the MAC Rx/Tx */
+ stmmac_mac_set(priv, priv->ioaddr, true);
+
ret = stmmac_request_irq(dev);
if (ret)
goto irq_error;
--
2.43.0
next prev parent reply other threads:[~2026-08-14 6:08 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-14 6:07 [PATCH net-next v4 0/3] fix the MTL fifo and DMA race condition Abid Ali
2026-08-14 6:07 ` Abid Ali [this message]
2026-08-18 13:57 ` [PATCH net-next v4 1/3] net: stmmac: enable MAC rx/tx after DMA start Paolo Abeni
2026-08-20 4:53 ` Abid Ali
2026-08-14 6:07 ` [PATCH net-next v4 2/3] net: stmmac: xgmac: tear the datapath down in the documented order Abid Ali
2026-08-18 13:57 ` Paolo Abeni
2026-08-14 6:07 ` [PATCH net-next v4 3/3] net: stmmac: xgmac: decouple the MAC Rx/Tx enables from the DMA ops Abid Ali
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