From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from rtits2.realtek.com.tw (rtits2.realtek.com [211.75.126.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9623A3ACF0F; Mon, 31 Aug 2026 05:43:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.75.126.72 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788155026; cv=none; b=A603tyd4YCOvmxIisfOJg+vCJzJqIweTkjzslu5bOUB9+pwed6lDZtiv3UHUd98dfP54DAM49j0yX/dKw6UI7VM6GSH8+jp+syNnv728EaAxNa1Oihk+GhH2W1oAd0F+sgvca5wykkh+Pp7qTAp0waUerZD8U8FegNTMaxhKVsU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788155026; c=relaxed/simple; bh=sJhFqDYtfwxMOCfULwJTE9BuxDyl2npj9n+uk7GCupc=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=JOl3teJmLn8BeiOYMIgMHSWi3fn2EpPlCN2pOGSlxS3gHqx55+2OueSDabCqWhMReaAco2xuxuzWEEMVkUr/9vGUajUptw3Gr6omLnwVi8nEnxW2o9IVufIQKzGMfQ+lSR2qMK2uoK9VKQtni0yxqzoxyq8/2tXNKiLSDhu4S1Y= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realsil.com.cn; spf=pass smtp.mailfrom=realsil.com.cn; dkim=pass (2048-bit key) header.d=realsil.com.cn header.i=@realsil.com.cn header.b=AQ0cc5j9; arc=none smtp.client-ip=211.75.126.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realsil.com.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=realsil.com.cn Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=realsil.com.cn header.i=@realsil.com.cn header.b="AQ0cc5j9" X-SpamFilter-By: ArmorX SpamTrap 5.80 with qID 67V5bqdsF479105, This message is accepted by code: ctloc85258 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=realsil.com.cn; s=dkim; t=1788154672; bh=HJ/g7gHiWfxWMcWXtGdi3IAy66uBR0+gT74QoeQY5bk=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Transfer-Encoding:Content-Type; b=AQ0cc5j9mpm8Cz+JYqrtUIuNte6lH9/4Ejt+um9BGBVF9hd8bQE1kRcmM7mqojnm0 dTclSvNfKMI4Ifq5rE6cgzWAqWK3pessVYceoa0Zr1Nq4SXh3sXIWEAVFd9vFsD9Dc KFIDzhl8ckK5WYrcKWkm80/TaTfu8Few5auhXny6MXHdl5sxWDrlTLcWTud3/8PTy1 lMkWfCf5cgEkD5MWYYj6amp6n17BOfyErbUCVhnGL29nhIESST+PQZ0b7GVKhDLXqd 0/lrlx/NHvFQsDgiuJpgy3ErcZxnNcEsi3oOoi+8XLVn1Spim2+CTjtAvM+lEbqGlo RvSy/qaiQdAVw== Received: from RS-EX-MBS4.realsil.com.cn ([172.29.17.104]) by rtits2.realtek.com.tw (8.15.2/3.29/5.94) with ESMTPS id 67V5bqdsF479105 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 31 Aug 2026 13:37:52 +0800 Received: from RS-EX-MBS2.realsil.com.cn (172.29.17.102) by RS-EX-MBS4.realsil.com.cn (172.29.17.104) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.43; Mon, 31 Aug 2026 13:37:51 +0800 Received: from 172.29.37.154 (172.29.37.152) by RS-EX-MBS2.realsil.com.cn (172.29.17.102) with Microsoft SMTP Server id 15.2.2562.43 via Frontend Transport; Mon, 31 Aug 2026 13:37:51 +0800 From: javen To: , , , , , , , , CC: , , , , , , Javen Xu Subject: [PATCH net-next v9 6/7] r8169: add ltr support for RTL8117 series Date: Mon, 31 Aug 2026 13:37:44 +0800 Message-ID: <20260831053745.1197-7-javen_xu@realsil.com.cn> X-Mailer: git-send-email 2.50.1.windows.1 In-Reply-To: <20260831053745.1197-1-javen_xu@realsil.com.cn> References: <20260831053745.1197-1-javen_xu@realsil.com.cn> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain From: Javen Xu This patch adds ltr support for RTL8117 series, enables RTL8117 series enter l1.2 state. This makes sense for the system to enter c10 state. This patch drops the COMBO_LTR_EXTEND_EN write for VER_52. This is intentional, as this bit is not required for RTL8116af. Signed-off-by: Javen Xu --- Changes in v2: - no changes Changes in v3: - no changes Changes in v4: - no changes Changes in v5: - no changes Changes in v6: - no changes Changes in v7: - no changes Changes in v8: - no changes Changes in v9: - no changes --- drivers/net/ethernet/realtek/r8169_main.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c index eecde26d9de2..5dbbc3a48c09 100644 --- a/drivers/net/ethernet/realtek/r8169_main.c +++ b/drivers/net/ethernet/realtek/r8169_main.c @@ -353,11 +353,13 @@ enum rtl_registers { ALDPS_LTR = 0xe0a2, LTR_OBFF_LOCK = 0xe032, LTR_SNOOP = 0xe034, + SEND_LTR_MSG = 0xe038, #define ALDPS_LTR_EN BIT(0) #define LTR_OBFF_LOCK_EN BIT(0) #define LINK_SPEED_CHANGE_EN BIT(14) #define LTR_SNOOP_EN GENMASK(15, 14) +#define LTR_MSG_EN BIT(0) }; enum rtl8168_8101_registers { @@ -3194,8 +3196,23 @@ static void rtl_enable_ltr(struct rtl8169_private *tp) r8168_mac_ocp_write(tp, 0xcdf2, 0x9003); r8168_mac_ocp_modify(tp, LTR_OBFF_LOCK, 0x0000, LINK_SPEED_CHANGE_EN); break; - case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48: case RTL_GIGA_MAC_VER_52: + r8168_mac_ocp_write(tp, 0xcdd0, 0x9003); + r8168_mac_ocp_modify(tp, LTR_SNOOP, 0x0000, LTR_SNOOP_EN); + r8168_mac_ocp_write(tp, 0xe02c, 0x1880); + r8168_mac_ocp_write(tp, 0xe02e, 0x4880); + r8168_mac_ocp_modify(tp, ALDPS_LTR, 0x0000, ALDPS_LTR_EN); + r8168_mac_ocp_write(tp, 0xcdd8, 0x9003); + r8168_mac_ocp_write(tp, 0xcdda, 0x9003); + r8168_mac_ocp_write(tp, 0xcddc, 0x9003); + r8168_mac_ocp_write(tp, 0xcdd2, 0x883c); + r8168_mac_ocp_write(tp, 0xcdd4, 0x8c12); + r8168_mac_ocp_write(tp, 0xcdd6, 0x9003); + r8168_mac_ocp_write(tp, 0xe0a6, 0x9003); + r8168_mac_ocp_write(tp, 0xe0a8, 0x9003); + r8168_mac_ocp_modify(tp, LTR_OBFF_LOCK, 0x0000, LINK_SPEED_CHANGE_EN); + break; + case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48: r8168_mac_ocp_modify(tp, ALDPS_LTR, 0x0000, ALDPS_LTR_EN); RTL_W8(tp, COMBO_LTR_EXTEND, RTL_R8(tp, COMBO_LTR_EXTEND) | COMBO_LTR_EXTEND_EN); fallthrough; @@ -3215,6 +3232,7 @@ static void rtl_enable_ltr(struct rtl8169_private *tp) } /* chip can trigger LTR */ r8168_mac_ocp_modify(tp, LTR_OBFF_LOCK, 0x0003, LTR_OBFF_LOCK_EN); + r8168_mac_ocp_modify(tp, SEND_LTR_MSG, 0x0000, LTR_MSG_EN); } static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool enable) @@ -3248,6 +3266,7 @@ static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool enable) rtl_enable_ltr(tp); switch (tp->mac_version) { case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48: + case RTL_GIGA_MAC_VER_52: case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_LAST: /* reset ephy tx/rx disable timer */ r8168_mac_ocp_modify(tp, 0xe094, 0xff00, 0); @@ -3260,6 +3279,7 @@ static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool enable) } else { switch (tp->mac_version) { case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48: + case RTL_GIGA_MAC_VER_52: case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_LAST: r8168_mac_ocp_modify(tp, 0xe092, 0x00ff, 0); break; -- 2.43.0