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Wed, 02 Sep 2026 16:07:45 -0700 (PDT) Received: from localhost ([2a03:2880:31ff:26::]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7f74caad7dbsm3277884a34.2.2026.09.02.16.07.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Sep 2026 16:07:44 -0700 (PDT) From: Mohsin Bashir To: mkubecek@suse.cz Cc: netdev@vger.kernel.org, kuba@kernel.org, mohsin.bashr@gmail.com Subject: [PATCH ethtool 1/3] ethtool: fbnic: fix off-by-one shift in reg dump parser Date: Wed, 2 Sep 2026 16:07:37 -0700 Message-ID: <20260902230739.2241212-2-mohsin.bashr@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260902230739.2241212-1-mohsin.bashr@gmail.com> References: <20260902230739.2241212-1-mohsin.bashr@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Mohsin Bashir The INTR, INTR_CQ, QM_TX, QM_RX, TCE and TCE_RAM section parsers skipped the first register value and stopped before the final register. Every decoded value was consequently associated with the preceding CSR while the section length still appeared valid. Consume the first value without an extra increment and iterate through the inclusive section end. Fixes: a38a2d3a8271 ("ethtool: fbnic: ethtool dump parser") Signed-off-by: Mohsin Bashir --- fbnic.c | 18 ++++++------------ 1 file changed, 6 insertions(+), 12 deletions(-) diff --git a/fbnic.c b/fbnic.c index a5b1d76..e368c60 100644 --- a/fbnic.c +++ b/fbnic.c @@ -5598,8 +5598,7 @@ static int fbnic_dump_fb_nic_intr_global(uint32_t **regs_buffp, return -1; } - regs_buff++; - for (csr_offset = csr_start_addr; csr_offset < csr_end_addr; + for (csr_offset = csr_start_addr; csr_offset <= csr_end_addr; csr_offset += k) { k = 1; reg_val = *regs_buff; @@ -5728,9 +5727,8 @@ static int fbnic_dump_fb_nic_intr_msix(uint32_t **regs_buffp, * from a different register array at the same index. * Every 4th register belongs to one register array */ - regs_buff++; for (csr_offset = csr_start_addr; - csr_offset < csr_end_addr; csr_offset++) { + csr_offset <= csr_end_addr; csr_offset++) { i = csr_offset - *section_start; reg_val = *regs_buff; @@ -5818,9 +5816,8 @@ static int fbnic_dump_fb_nic_qm_tx_global(uint32_t **regs_buffp, return -1; } - regs_buff++; for (csr_offset = csr_start_addr; - csr_offset < csr_end_addr; csr_offset++) { + csr_offset <= csr_end_addr; csr_offset++) { reg_val = *regs_buff; switch (csr_offset) { case REGISTER_RANGE(FBNIC_QM_TWQ_IDLE): @@ -6301,9 +6298,8 @@ static int fbnic_dump_fb_nic_qm_rx_global(uint32_t **regs_buffp, return -1; } - regs_buff++; for (csr_offset = csr_start_addr; - csr_offset < csr_end_addr; csr_offset++) { + csr_offset <= csr_end_addr; csr_offset++) { reg_val = *regs_buff; switch (csr_offset) { @@ -6750,9 +6746,8 @@ static int fbnic_dump_fb_nic_tce(uint32_t **regs_buffp, return -1; } - regs_buff++; for (csr_offset = csr_start_addr; - csr_offset < csr_end_addr; csr_offset++) { + csr_offset <= csr_end_addr; csr_offset++) { reg_val = *regs_buff; switch (csr_offset) { @@ -7450,9 +7445,8 @@ static int fbnic_dump_fb_nic_tce_ram(uint32_t **regs_buffp, return -1; } - regs_buff++; for (csr_offset = csr_start_addr; - csr_offset < csr_end_addr; csr_offset++) { + csr_offset <= csr_end_addr; csr_offset++) { reg_val = *regs_buff; switch (csr_offset) { -- 2.53.0-Meta