From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 57ED3217648 for ; Fri, 11 Sep 2026 00:34:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.14 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789086891; cv=none; b=swevtC5ra6tqA6A0DbH5yawym1tt/unXKR/IBGywV9UpNN7wV6kOStQLLnI1wQcvHTs9uN7U2LbqfDnF+tzNOAycWOLh1Z5NncE5wtRuhDSNx+uKjyEIEiUp4nwMg/Q8Xf603cZtD06qxM44H+R4y4sCn1OgyEHF4nJdZO1JOI4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789086891; c=relaxed/simple; bh=aNqIx7752DCCSYF9F2n6FK9fs+w4IJF3IR7r0MeU/Cg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=IvkZuj9xDwK57Zpkb0ZVwzAB0F08Vg0uHNiIWsEPBcFgSOp5fNDP19mogBZOnV3AD78eq13pIhPs7kdIswoR/UtCQpqWyPnELYw6TWMapZX+Gw90iDUl2u3wsomGnOtpptHqu5wSWzocj/JvaWTjBsHVvgF5b5Lrk+ZNP12B7Rk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=h5wp90kg; arc=none smtp.client-ip=192.198.163.14 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="h5wp90kg" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1789086888; x=1820622888; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=aNqIx7752DCCSYF9F2n6FK9fs+w4IJF3IR7r0MeU/Cg=; b=h5wp90kgeL0gsw8zY4JDzKDvibU6I0KaSEpBEdjXTKoZGAks1/MWS1xh E4tP//u8SnVvXH5ckRLde5At4idJlko6Uhpubvt3u1mOzbOGa2eQBM053 tsecoI0wvxXAfWsZvNJ/pmBnNWmhT0vLpQIhqBsuvrCtHWDm7aCxT9MjG XzLXIeYW6OeStTU7FrqyJQb9gPugK6tA5OokTYenuR9Dr2Tb1u5QxL9jW 4N0RV5WZSboxFgHm/MAVF3JI4yvcV3z1b6nAdV4VxckZjfOHSV0AqR+IT GPhA0EH1wY+l47xvxTiTxPYchiuJNOE6KwWT1ASWDj7BjivsS1VUyh/nU g==; X-CSE-ConnectionGUID: 45pZ1YRxTT2Jy3Luf/Y+BA== X-CSE-MsgGUID: 5pnEviaHRBKb9YkfBbCJ8A== X-IronPort-AV: E=McAfee;i="6800,10657,11901"; a="89564697" X-IronPort-AV: E=Sophos;i="6.27,96,1787036400"; d="scan'208";a="89564697" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa108.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Sep 2026 17:34:43 -0700 X-CSE-ConnectionGUID: HQzYlg73R5yreg3+RHhOUg== X-CSE-MsgGUID: XUOW0PG9Tpi61Sy+iokAtQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.27,96,1787036400"; d="scan'208";a="272291055" Received: from anguy11-upstream.jf.intel.com ([10.166.9.133]) by orviesa009.jf.intel.com with ESMTP; 10 Sep 2026 17:34:44 -0700 From: Tony Nguyen To: davem@davemloft.net, kuba@kernel.org, pabeni@redhat.com, edumazet@google.com, andrew+netdev@lunn.ch, netdev@vger.kernel.org Cc: Karol Kolacinski , jacob.e.keller@intel.com, maciej.machnikowski@intel.com, przemyslaw.korba@intel.com, grzegorz.nitka@intel.com, sergey.temerkhanov@intel.com, arkadiusz.kubalewski@intel.com, poros@redhat.com, richardcochran@gmail.com, horms@kernel.org, Aleksandr Loktionov , Alexander Nowlin Subject: [PATCH net 05/15] ice: E822: cancel offset verification work during reset preparation Date: Thu, 10 Sep 2026 17:34:14 -0700 Message-ID: <20260911003430.3386340-6-anthony.l.nguyen@intel.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20260911003430.3386340-1-anthony.l.nguyen@intel.com> References: <20260911003430.3386340-1-anthony.l.nguyen@intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Karol Kolacinski Cancel the offset verification delayed work (ov_work) during PTP reset preparation to prevent it from running concurrently with the reset sequence. Without this, ice_ptp_wait_for_offsets() can execute during a reset, find that ice_is_reset_in_progress() is true, and re-queue itself in a tight loop. Meanwhile, the reset path in ice_ptp_rebuild_owner() calls ice_ptp_port_phy_restart(), which starts a new ov_work. This results in two ov_work instances running simultaneously, racing over the PHY offset registers and the calibrating flag. Cancel ov_work in ice_ptp_prepare_for_reset() alongside the existing cancellation of the Tx tracker. The comment in the existing code already documents that ov_work interference during reset is a concern but only cancels it during ice_ptp_release(). Fixes: 4809671015a1 ("ice: Fix E810 PTP reset flow") Signed-off-by: Karol Kolacinski Reviewed-by: Aleksandr Loktionov Signed-off-by: Arkadiusz Kubalewski Signed-off-by: Przemyslaw Korba Reviewed-by: Maciek Machnikowski Tested-by: Alexander Nowlin Signed-off-by: Tony Nguyen --- drivers/net/ethernet/intel/ice/ice_ptp.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c index d018f02f700d..9bf3bac552f1 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c @@ -2998,6 +2998,14 @@ void ice_ptp_prepare_for_reset(struct ice_pf *pf, enum ice_reset_req reset_type) if (reset_type == ICE_RESET_PFR) return; + /* Cancel the offset verification work for E82x before releasing the + * Tx tracker. If ov_work is running during reset, it may issue + * sideband queue commands that will fail or timeout, and may + * reference state that is being torn down. + */ + if (hw->mac_type == ICE_MAC_GENERIC) + kthread_cancel_delayed_work_sync(&ptp->port.ov_work); + if (ice_pf_src_tmr_owned(pf) && hw->mac_type == ICE_MAC_GENERIC_3K_E825) ice_ptp_prepare_rebuild_sec(pf, false, reset_type); -- 2.47.1