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[174.29.1.49]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-486ab6c1f31sm578446fac.10.2026.09.17.10.55.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Sep 2026 10:55:20 -0700 (PDT) From: James Hilliard Subject: [PATCH net-next v3 0/3] net: stmmac: add Allwinner H616 EMAC1 support Date: Thu, 17 Sep 2026 11:55:11 -0600 Message-Id: <20260917-submit-h616-emac1-v1-v3-0-62cb8316e19b@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAAAAAAAC/42Oyw6CMBBFf4V0bU1fILjyP4yLtgxQI8W0tcEQ/ t1SXbhwYTKbm5l7zizIgzPg0bFYkINovJlsCnxXID1I2wM2bcqIEVaRhgrsH2o0AQ8VrTCMUlM cKaaCHwivBZNKoVS9O+jMnLFnZCFgC3NAl/cmEa6gw0bdbgfjw+Se+YNIc+MjK3/L0hBMm7IFo hTtannqR2luez2NWRHZPxCWIJwxxRkIAqr5hqzr+gK92Q3iGQEAAA== X-Change-ID: 20260914-submit-h616-emac1-v1-143703842abb To: Richard Genoud , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Alexandre Torgue , Giuseppe Cavallaro , Jose Abreu , Maxime Chevallier , Maxime Coquelin Cc: Maxime Ripard , Alastair D'Silva , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, James Hilliard X-Mailer: b4 0.15.2 The H616 secondary EMAC supports RMII at 10/100 Mbps and uses a separate system-control clock register at offset 0x34. Add its binding and a sun8i stmmac variant using that register. A distinct compatible without an older fallback prevents the driver from using EMAC0's clock register. EMAC1 connects internally to the co-packaged AC200 or AC300 EPHY and has no external PHY pins. Leave PHY initialization to the PHY driver instead of using the H3 internal-PHY controls. The RMII-only variant does not expose the RGMII clock-delay properties. First move the MAC software reset from probe to the DMA reset callback, after PHY initialization. This lets the MAC and its MDIO bus remain registered when the PHY driver or one of its suppliers is not ready yet. Keep the separate H3 MDIO-mux reset sequence unchanged. The AC200/AC300 EPHY driver and package bindings are already in net-next. This series separates the H616 EMAC1 MAC driver and binding support from the earlier combined series. PWM, MFD and device-tree enablement are being handled separately. Signed-off-by: James Hilliard --- Changes in v3: - Add a prerequisite fix moving the MAC software reset to the DMA reset callback, after PHY initialization, so delayed module loading and deferred PHY probes do not tear down the MAC and its MDIO bus. - Preserve the H3 MDIO-mux reset and propagate hardware-reset failures through the normal stmmac hardware-setup error path. - Add Alastair D'Silva to Cc and rebase onto current net-next. - Link to v2: https://patch.msgid.link/20260915-submit-h616-emac1-v1-v2-0-322b32e40eb9@gmail.com Changes in v2: - Drop EMAC1 TX/RX clock-delay property support and keep the existing RGMII-only delay descriptions unchanged, as requested by Maxime Ripard. - Clarify that EMAC1 connects internally to a co-packaged PHY, not an external PHY or the H3-style internal-PHY controls. - Rebase onto current net-next. - Link to v1: https://patch.msgid.link/20260915-submit-h616-emac1-v1-v1-0-195de0bb1f8a@gmail.com --- James Hilliard (3): net: stmmac: sun8i: reset the MAC after PHY initialization dt-bindings: net: allwinner: add H616 EMAC1 net: stmmac: sun8i: add support for Allwinner H616 EMAC1 .../bindings/net/allwinner,sun8i-a83t-emac.yaml | 13 +++++ .../devicetree/bindings/net/snps,dwmac.yaml | 2 + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 66 +++++++++++++--------- 3 files changed, 55 insertions(+), 26 deletions(-) --- base-commit: 26ee8cd69d46a14b37ba5e512084fe80d730127a change-id: 20260914-submit-h616-emac1-v1-143703842abb Best regards, -- James Hilliard