From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 765BC4F392E; Fri, 18 Sep 2026 11:35:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789731310; cv=none; b=QVMcCS5yV2G+laaliS90QbmNVnSsTFe0pyf4MZwGoxqgDVq/2nWu/wN1IcGQ6f+eQVxL0Z+QVRTk/bTWb5eiDRKE9T8vLPMxGXb/WIk3dv0L8lXGA32HznnmF0u4CKIwp+fpxdQIujcaiXXTQrbeG7HlHCMNwzAR9EU1N+Qdc8E= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789731310; c=relaxed/simple; bh=wGxs+F/+5Vrhuyz2y5uEWLeuFrAw1YPbFSMnjR0PIic=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=RGOy6xoFs/2OwyBp6RPe+4GKGmba2HJ5p+SGJc4oDsXTX+wAIk5Kc7lzOPZmYMezeNJ+SZ7xsKAYr3vdlRbqbwa+k2b9KpAoHY+5+p+3UohCKlYqgPQv+78zAKz1grq/nEPPp/nRmOKIj56NR5ipw+zC6LjHeG9onnNWMjaFk1s= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=UfiHvClL; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="UfiHvClL" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1789731308; x=1821267308; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=wGxs+F/+5Vrhuyz2y5uEWLeuFrAw1YPbFSMnjR0PIic=; b=UfiHvClLrqONT81au3QmtN1De0oPKobZOw5buAAToyvnbfqiwAlKcP11 q6kVtYr/rvYG5yM3PhFnfGAgg65dHYRRpjZzLV/547/l9V4BuRtoCWTcz 3In3Nuyq+GN9T5+kjmJap+xih2zBdBI6VuyVQEZE2O0Z/hkEfODOEHAP5 XcLJk6u1OUtHqSA7VVwkt5iwSp08+TmeGi5gSTLkJX4MJasC352k9Ze20 HtqFqnpQN2GDRNGW3BdQTwqLIb/8n4CO44TfiUwfzxKwUvS/CGN4TtoSd 30W7IyGwbqcIXRcehh4sEYlHh1Lt9GEQx1wiwXQcaaj4RTOOvvfKEf64e w==; X-CSE-ConnectionGUID: sCLJV7FZS8mM3CChFuNh7w== X-CSE-MsgGUID: WSOfmcd1RBWFuEl/bh22iA== X-IronPort-AV: E=Sophos;i="6.27,108,1787036400"; d="scan'208";a="73885846" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Sep 2026 04:35:07 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.87.151) by chn-vm-ex3.mchp-main.com (10.10.87.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.49; Fri, 18 Sep 2026 04:35:07 -0700 Received: from DEN-DL-M70577.microsemi.net (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Fri, 18 Sep 2026 04:35:03 -0700 From: Daniel Machon Date: Fri, 18 Sep 2026 13:34:06 +0200 Subject: [PATCH net-next v7 14/14] misc: lan966x-pci: dts: add fdma interrupt to overlay Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20260918-lan966x-pci-fdma-v7-14-0ecc179c8a2c@microchip.com> References: <20260918-lan966x-pci-fdma-v7-0-0ecc179c8a2c@microchip.com> In-Reply-To: <20260918-lan966x-pci-fdma-v7-0-0ecc179c8a2c@microchip.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Steen Hegelund , , "Alexei Starovoitov" , Daniel Borkmann , "Jesper Dangaard Brouer" , John Fastabend , Stanislav Fomichev , Herve Codina , Arnd Bergmann , Greg Kroah-Hartman , Mohsin Bashir CC: Richard Cochran , , , , X-Mailer: b4 0.14.3 Add the fdma interrupt (OIC interrupt 14) to the lan966x PCI device tree overlay, enabling FDMA-based frame injection/extraction when the switch is connected over PCIe. Tested-by: Herve Codina Signed-off-by: Daniel Machon --- drivers/misc/lan966x_pci.dtso | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/misc/lan966x_pci.dtso b/drivers/misc/lan966x_pci.dtso index 7bb726550caf..5bb12dbc0843 100644 --- a/drivers/misc/lan966x_pci.dtso +++ b/drivers/misc/lan966x_pci.dtso @@ -141,8 +141,9 @@ switch: switch@e0000000 { interrupt-parent = <&oic>; interrupts = <12 IRQ_TYPE_LEVEL_HIGH>, + <14 IRQ_TYPE_LEVEL_HIGH>, <9 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "xtr", "ana"; + interrupt-names = "xtr", "fdma", "ana"; resets = <&reset 0>; reset-names = "switch"; -- 2.34.1