From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DEF1C5187CC for ; Fri, 18 Sep 2026 13:33:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.10 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789738406; cv=none; b=QFMN/ydx/cfBwaPd62Sm/ADWxhaeyc77SFeo+vG3HhFfoSGCpp98RUSgRfBy5h2IS0Dgc9bK3gM0BSyWEKQzqroFPOs97Uo2nUVTLyEbZJxjl083fJ8w0gc9D8pQnWdaSR6UHFjb51cuiciHFRD7Vwpp777kvvzrAH+yDidC3Kc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789738406; c=relaxed/simple; bh=lGVnIQv9TtpdjxowxbaaH8QKjUMRQwGbViMg10Lb1h4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=h/qFHsXi9Dal5EI8wPrtwHUfM0B8aoc4tKMbDfI73J4lKsg2HgxgsOBAljDuPiRb2JwwrF23IO0Dz4xnSHyCalYv8m8Dfs7PmisFih+5CckuibtEs10ehFj57jDQHASeDQZyX/ZzVy7H/TaIjecgm9vNW0J+l6c/l2+tX/r6Eb8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=WVSe3cG7; arc=none smtp.client-ip=192.198.163.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="WVSe3cG7" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1789738405; x=1821274405; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=lGVnIQv9TtpdjxowxbaaH8QKjUMRQwGbViMg10Lb1h4=; b=WVSe3cG7b2265Oyif1xdxw90cHzxADW9bQHNaQXy8H3Iqx86KAw10iFU xCTjo30g/NBFrhqX9SHcZnf+w6n5xFEv5WSXod3ezSSVWuZFoi6EG+y7X mMaQDJVrGG/o/IVGHKb88A+Pv1vNAMbXCHu+tgLZ49gc46eq95EV95B1d qfkbbcTiX6tpENedKryKJQaNza4USk1EoXZPM6kRlKWJ/ug2NZMP9EXk9 emwjlx4bK0n620BntwbHb+xCqbETH/mxus95sOjJ/eAJ9l1WwtQ0UpRd3 7frb0SHU/WKLPBw/EEzbLsU1PeO9ILRIYDjMGw72FVoUuvkm4M+sB5ZFo Q==; X-CSE-ConnectionGUID: KYGUeW90RW2MISegqkB9iQ== X-CSE-MsgGUID: 49/HUy0lS7WOn/FMF88Bbg== X-IronPort-AV: E=McAfee;i="6800,10657,11908"; a="101592509" X-IronPort-AV: E=Sophos;i="6.27,109,1787036400"; d="scan'208";a="101592509" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Sep 2026 06:33:25 -0700 X-CSE-ConnectionGUID: zBUIBspHSQWmHgiqL3WHCg== X-CSE-MsgGUID: Ucbo1cRqTXm8oqK9pU4tzg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.27,109,1787036400"; d="scan'208";a="270717993" Received: from amlin-019-225.igk.intel.com ([10.102.19.225]) by fmviesa010.fm.intel.com with ESMTP; 18 Sep 2026 06:33:23 -0700 From: Aleksandr Loktionov To: intel-wired-lan@lists.osuosl.org, anthony.l.nguyen@intel.com, aleksandr.loktionov@intel.com Cc: netdev@vger.kernel.org, Simon Horman Subject: [PATCH iwl-next v2 4/4] ixgbe: add IXGBE_ITR_ADAPTIVE_MASK_USECS constant Date: Fri, 18 Sep 2026 15:33:16 +0200 Message-ID: <20260918133317.4169815-5-aleksandr.loktionov@intel.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260918133317.4169815-1-aleksandr.loktionov@intel.com> References: <20260918133317.4169815-1-aleksandr.loktionov@intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Alexander Duyck ixgbe_set_itr() clears the mode flag (IXGBE_ITR_ADAPTIVE_LATENCY, bit 7) with the open-coded complement expression ~IXGBE_ITR_ADAPTIVE_LATENCY. This is equivalent to keeping only bits [6:0], i.e. the usecs sub-field. Add IXGBE_ITR_ADAPTIVE_MASK_USECS = IXGBE_ITR_ADAPTIVE_LATENCY - 1 = 0x7F to name this mask explicitly and replace the open-coded AND-NOT operation with the cleaner AND form. The two expressions are arithmetically identical; the change improves readability. Signed-off-by: Alexander Duyck Reviewed-by: Simon Horman Signed-off-by: Aleksandr Loktionov --- drivers/net/ethernet/intel/ixgbe/ixgbe.h | 1 + drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe.h b/drivers/net/ethernet/intel/ixgbe/ixgbe.h index 1a7fd90..594ccb2 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe.h +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe.h @@ -478,6 +478,7 @@ static inline unsigned int ixgbe_rx_pg_order(struct ixgbe_ring *ring) #define IXGBE_ITR_ADAPTIVE_MAX_USECS 84 #define IXGBE_ITR_ADAPTIVE_LATENCY 0x80 #define IXGBE_ITR_ADAPTIVE_BULK 0x00 +#define IXGBE_ITR_ADAPTIVE_MASK_USECS (IXGBE_ITR_ADAPTIVE_LATENCY - 1) struct ixgbe_ring_container { struct ixgbe_ring *ring; /* pointer to linked list of rings */ diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c index 7fb2ab4..8d3627c 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c @@ -2962,7 +2962,7 @@ static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector) new_itr = min(q_vector->rx.itr, q_vector->tx.itr); /* Clear latency flag if set, shift into correct position */ - new_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY; + new_itr &= IXGBE_ITR_ADAPTIVE_MASK_USECS; new_itr <<= 2; if (new_itr != q_vector->itr) { -- 2.52.0