From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f194.google.com (mail-pl1-f194.google.com [209.85.214.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9BCE14BD10B for ; Tue, 22 Sep 2026 20:04:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.194 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790107489; cv=none; b=T251hzj0waeIVc7y3bAOBSMZQdzwfAjo3UIinYJCuwcEaPMZpMP0MIwnGpFYb7vDmuuJPCdyYACgSIIDsO2J+5ze/1Nc5bQa2ZlgGCnf+fPrveBGuJrHpol5vO8JLTfMBzsP2My3sd2+6sDKZ2RJEh0nkRAuo/HQfhHTHZt01ho= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790107489; c=relaxed/simple; bh=k9eLD1ZrXZD1iMizDWP4jTUk+ML36ocfJ7jazjazAIs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=FJvbWb7XjC4NNhcyaz5lmNiTl8tYHrsJzN9hsZylSPN6d65lGfoxhEje4s4mCZO2K4GOmzfpkwFy9qIx94iKPY1eQLQyzIO/g50SF2dPwurOPqt0B9GnzOPHM8V6j8fjpRGZ78Bp0+jGLLTmreY53oaOYony99yAabVie+6AxAU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=LeAb1uHQ; arc=none smtp.client-ip=209.85.214.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="LeAb1uHQ" Received: by mail-pl1-f194.google.com with SMTP id d9443c01a7336-2caced6038eso1810345ad.0 for ; Tue, 22 Sep 2026 13:04:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1790107474; x=1790712274; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=s/eBjsMbUu4KmQPd6dfybXXRKRWzlAuXWPZqO5pNdlA=; b=LeAb1uHQ/QEIx5DWr68k/8/JzDe5qrf1AnKNJ/S8U2S/xNTt7Vu6iiHAY8H802PwLT 6Qh1VHdaTNdXVbWJLu65mIIKngtxIjJXXE4ESzchdCLlycBZrvFBN1tsx/SWVLBSXpC9 unelFI+6rqtJyp8wu0Zep9dop7wetSHx2pKcvTDeUfixbeMUSCT0Uw7CE2UZOn17Vaid eLQrJABKKEj9ZTV1BkPYbZO+Q2ozAx7rpKh38vfaApkzYEs0vdCBCPohW8B6wrCI9mfa iLyJApwBPIZwrFDKU0DwsAfF3EvpvuBvFyTC2MIzHlvG4xcIYSB6ut3TT7BZFlxpQcVw gqrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790107474; x=1790712274; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=s/eBjsMbUu4KmQPd6dfybXXRKRWzlAuXWPZqO5pNdlA=; b=a3t2p0RdsSzvFmf9raKhAqASGtIzf/aiVDkEl9IrqO3oSvkjBFOawnykwUwklw88AM ERBMnzpA928ujPxqDt4D4WuppL/n23atJr8GId/hOXST2G3TutyqVnGrc1abjRio+G64 NM0xDfYm/DgtM1LKEmctzNvSEcPiD0aMcQm5nUIrZNBQdvArGlANbNX1PTU5IawucEo1 cWnQcIbtdYHzHv8gASkrb5MS1VlXq6qAq3viM1TymV/7Sl6nsdmPWSZBCdydglbU2bxH M5taPvnJWwLzj/OAMutdsXvh/iYjleqKd3qTYiOwHPjtYXsWH7ABugFsdfWMWwB9fVr4 Apsg== X-Forwarded-Encrypted: i=1; AKwUvBy1EMZGftmxITb6CleT+itWJtpK6yBu4xpxLWkQeLSLvAOPwd7Y/7bEMtIesowOnKoynprj1y0=@vger.kernel.org X-Gm-Message-State: AFuF++kAJKjS8e67Q0FG1OYqYlSjxQsMYjIKZyJF2+df//P+YAZ2SlRw DwIN97OIXtILx9jv5RK2JXUO32/549Tk6HCBzSIuWBF4ncW/DwwE4x7Q X-Gm-Gg: AYBFou0W6h7xp+d3s5DbZxJnbnTuP1ByGRtf33xLmHwrbhoLFg9mtEJUevvpXwJSNpq CcFW6GEqvRzJjTZ+KqponY1qTt0BB/EXHyL43KJ7V0IjBfgh2SpVYA46PMjAtyBuHrYP9+5KpVR pQLuzKrx6q6qCx/KhwKlzFqDiWBgmDFMhbBpO8onXtSawA2imA2G3Ks4sx+iRdAWGhpGO6D1eH8 Ib8B7queRphtGIkaKTjdqKQ3RxOFcmXe1P9PUWV0I3bEPI8xfR2FUjY7mvgpqHpwGzFC1Vbu/11 XknQeJvD0VaGa+QUhqVeKyLcsMhaCE6VWyf+4KHAV0Ui/JNojom1/zFUMPDtjsWGc1cTAcgwWDD GgcTTCIePrUkgadBnv1a0ClxTkBVPMNS/3Vr82O3AJkIHd532f0WEaukZM23E9mhXABoI7sEqOl 9/Pq/vl0/GvsxVDMcHXCJPO0vPa9xL7wVC55jZvGtOP4efXUOA+ezw0wQhSxGOBHCq/bcJ X-Received: by 2002:a17:903:1b30:b0:2df:5c13:b37c with SMTP id d9443c01a7336-2df60b6920emr18526165ad.26.1790107473545; Tue, 22 Sep 2026 13:04:33 -0700 (PDT) Received: from server.lan ([168.138.199.194]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2df6a5eea15sm654515ad.64.2026.09.22.13.04.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Sep 2026 13:04:32 -0700 (PDT) From: Coia Prant To: Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Vinod Koul , Maxime Chevallier , Maxime Coquelin , Alexandre Torgue , Lad Prabhakar , Romain Gantois , Heiner Kallweit , Coia Prant Cc: Neil Armstrong , Russell King , Shawn Lin , David Heidelberg , netdev@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Jiawen Wu Subject: [PATCH net-next v10 06/11] net: pcs: xpcs: add ANRESTART support for SGMII link recovery Date: Wed, 23 Sep 2026 04:03:30 +0800 Message-ID: <20260922200336.2201212-7-coiaprant@gmail.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260922200336.2201212-1-coiaprant@gmail.com> References: <20260922200336.2201212-1-coiaprant@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit On some hardware using the DesignWare XPCS IP (e.g., RK3568 MAC side SGMII), the PCS does not automatically restart auto-negotiation when the link goes down and comes back up. Without an explicit ANRESTART, the link stays down forever. Add BMCR_ANRESTART in two places: 1. In xpcs_config_aneg_c37_sgmii(), when starting AN, set ANRESTART alongside ANENABLE to initiate a fresh negotiation. 2. In xpcs_get_state_c37_sgmii(), when link is down and AN completion is detected, clear the interrupt and trigger ANRESTART to restart the negotiation process. Propagate the return value of the restart so errors are not silently ignored. The restart cannot go through the .pcs_an_restart op: phylink only calls it for 802.3z interfaces, and SGMII is not one. Changing hardware state from pcs_get_state() is already done elsewhere in this driver (xpcs_get_state_c73() calls xpcs_soft_reset() and xpcs_do_config()), so the same pattern is used here. The latch is cleared before issuing the restart, not after: clearing it afterwards would discard a freshly latched ANCMPLT from the new negotiation. If an MDIO access fails at this point, it indicates an unrecoverable hardware condition until reset. Also clear DW_VR_MII_AN_INTR_STS in xpcs_config_aneg_c37_sgmii() before starting AN, matching what xpcs_config_aneg_c37_1000basex() already does. On the non-inband path the function now returns the result of that write instead of the DIG_CTRL1 modify. Update the comment in xpcs_config_aneg_c37_sgmii() to note that although the DesignWare databook says AN restart is not needed for MAC side SGMII, some implementations (e.g. Rockchip RK3568) require it to recover the link after a disconnect. This is not a fix for an existing mainline platform: the affected platform (RK3568 XPCS) is introduced later in the same series. Tested-by: Jiawen Wu Tested-by: Maxime Chevallier Signed-off-by: Coia Prant --- drivers/net/pcs/pcs-xpcs.c | 35 +++++++++++++++++++++++++++++------ 1 file changed, 29 insertions(+), 6 deletions(-) diff --git a/drivers/net/pcs/pcs-xpcs.c b/drivers/net/pcs/pcs-xpcs.c index 0337e2bcc0125..8c3875b6985b9 100644 --- a/drivers/net/pcs/pcs-xpcs.c +++ b/drivers/net/pcs/pcs-xpcs.c @@ -761,7 +761,9 @@ static int xpcs_config_aneg_c37_sgmii(struct dw_xpcs *xpcs, * DW xPCS used with DW EQoS MAC is always MAC side SGMII. * 4) VR_MII_DIG_CTRL1 Bit(9) [MAC_AUTO_SW] = 1b (Automatic * speed/duplex mode change by HW after SGMII AN complete) - * 5) VR_MII_MMD_CTRL Bit(12) [AN_ENABLE] = 1b (Enable SGMII AN) + * 5) VR_MII_AN_INTR_STS = 0x0 (Clear CL37 AN complete status) + * 6) VR_MII_MMD_CTRL Bit(12) [AN_ENABLE] = 1b (Enable SGMII AN) + * VR_MII_MMD_CTRL Bit(9) [AN_RESTART] = 1b (Restart SGMII AN) * * Note that VR_MII_MMD_CTRL is MII_BMCR. * @@ -769,7 +771,14 @@ static int xpcs_config_aneg_c37_sgmii(struct dw_xpcs *xpcs, * SR_MII_AN_ADV. MAC side SGMII receives AN Tx Config from * PHY about the link state change after C28 AN is completed * between PHY and Link Partner. There is also no need to - * trigger AN restart for MAC-side SGMII. + * trigger AN restart for MAC-side SGMII on most devices. + * + * Note: While the DesignWare databook states that AN restart is + * not needed for MAC side SGMII, some implementations (e.g. + * Rockchip RK3568) exhibit a timing quirk when integrated with + * phylink and do not restart AN automatically when the link + * comes back up. An explicit AN restart is required on those + * parts to recover the link after a disconnect. */ mdio_ctrl = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_BMCR); if (mdio_ctrl < 0) @@ -816,9 +825,14 @@ static int xpcs_config_aneg_c37_sgmii(struct dw_xpcs *xpcs, if (ret < 0) return ret; + /* Clear CL37 AN complete status */ + ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS, 0); + if (ret < 0) + return ret; + if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MII_BMCR, - mdio_ctrl | BMCR_ANENABLE); + mdio_ctrl | BMCR_ANENABLE | BMCR_ANRESTART); return ret; } @@ -1093,9 +1107,18 @@ static int xpcs_get_state_c37_sgmii(struct dw_xpcs *xpcs, return 0; } - /* Clear AN complete status or interrupt */ - if (state->an_complete) - xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS, 0); + if (state->an_complete) { + /* Clear AN complete status or interrupt */ + ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS, 0); + if (ret < 0) + return ret; + + /* Initiate the next round of AN */ + ret = xpcs_modify(xpcs, MDIO_MMD_VEND2, MII_BMCR, BMCR_ANRESTART, + BMCR_ANRESTART); + if (ret < 0) + return ret; + } return 0; } -- 2.47.3