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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Florian Fainelli , Vladimir Oltean , Christian Marangi , Heiner Kallweit , Russell King , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Ziyang Huang Subject: Re: [RFC PATCH net-next v3 4/5] net: dsa: qca8k: flag QCA8337 internal CPU PHYs for SmartSpeed Date: Sun, 27 Sep 2026 17:36:16 +0200 Message-ID: <20260927153616.2317-1-yongzhao.derek@gmail.com> X-Mailer: git-send-email 2.45.2.windows.1 In-Reply-To: References: <20260923215858.1653-1-yongzhao.derek@gmail.com> <20260923215858.1653-5-yongzhao.derek@gmail.com> <09d669ff-7aad-4414-880a-21c2e7bf2cd7@lunn.ch> <20260924234814.1734-1-yongzhao.derek@gmail.com> <20260925210153.8717-1-yongzhao.derek@gmail.com> <69b36e16-eece-4739-9208-96bd8e60943f@lunn.ch> <20260926082129.1632-1-yongzhao.derek@gmail.com> <426f9dcb-7473-48d5-a473-4435cc81312c@lunn.ch> <20260926215152.376-1-yongzhao.derek@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Hi Andrew,=0D =0D > Also tricky. What we don't want is other developers trying to abuse=0D > this to turn it into a configuration option, rather than a hardware=0D > property. So i don't think it should be a generic property. Lets make=0D > it a qualcomm specific property. I would also put 'workaround' in the=0D > property name, again making it clear this is not intended to be used=0D > for configuration.=0D =0D Thank you, that makes sense. I'll use a Qualcomm-specific property with=0D "workaround" in its name, and word the commit message around what has=0D been observed, as you suggested: an on-board PHY-to-PHY connection=0D without a cable, where SmartSpeed has been seen to downshift=0D incorrectly. The workaround would then apply only to boards that set=0D the property, rather than to every QCA8337 internal CPU PHY as in v3.=0D =0D One correction to the data I sent you: as Ziyang pointed out, the=0D IPQ5018 short-cable DAC values were not being applied on this board,=0D because the driver does not shift the field value. My earlier A/B runs=0D were therefore done without them. I have repeated the A/B with the DAC=0D values corrected, and the result is the same. The details are in my=0D reply to Ziyang in this thread.=0D =0D Before sending the next revision, I would like to check one more=0D thing. In these boots the QCA8337 CPU PHY is reset about 38 s before=0D the IPQ5018 PHY has its DAC values configured. If setting the DAC before=0D the switch-side PHY starts negotiating avoids the downshift, that would=0D suggest fixing the initialisation order rather than adding a DT=0D workaround. I'll report back on what I find before sending the next=0D revision. If the workaround is still needed, I'll propose the property=0D name and binding with it.=0D =0D Thanks,=0D Yongzhao Chen=0D