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[94.255.221.162]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c31a4d0c2c0sm9043366b.28.2026.10.08.12.35.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Oct 2026 12:35:27 -0700 (PDT) From: Yongzhao Chen To: netdev@vger.kernel.org Cc: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net v4] net: phy: qca83xx: read resolved QCA8337 link status Date: Thu, 8 Oct 2026 21:35:14 +0200 Message-ID: <20261008193515.14880-1-yongzhao.derek@gmail.com> X-Mailer: git-send-email 2.45.2.windows.1 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit After a QCA8337 SmartSpeed downshift, genphy_read_status() can report 1000 Mbit/s from the advertised modes when the PHY is running at 100 Mbit/s. On a Redmi AX5400 running downstream OpenWrt Linux 6.18.52, this caused qca8k to program the user-port MAC for 1000 Mbit/s and traffic failed. An earlier prototype that read the resolved speed from the PHY restored traffic. Wrap genphy_read_status() and use at803x_read_specific_status() to replace its speed and duplex result when an autonegotiated link comes up. Resolve pause for the resulting duplex. Until the PHY reports a resolved speed and duplex, report the link as down so that the next poll reads them again, as marvell_read_status_page_an() does. QCA8337's register layout matches the helper (data sheet 80-Y0619-3 Rev. D, pages 327-328). Keep the generic master/slave read order and the early return for a steady autonegotiated link. This avoids additional reads of the clear-on-read idle error count in MII_STAT1000. Forced mode continues to use BMCR. Report the MDI-X state read at link-up and invalidate it when the link goes down or autonegotiation is disabled. Clear mdix_ctrl because this driver does not implement MDI-X configuration. Fixes: b3591c2a3661 ("net: dsa: qca8k: Switch to PHYLINK instead of PHYLIB") Suggested-by: Andrew Lunn Signed-off-by: Yongzhao Chen Assisted-by: LLM --- v4: - Report the link as down while the PHY-specific status is unresolved or holds the reserved speed value, as marvell_read_status_page_an() does. v3 reported the link up with SPEED_UNKNOWN, and the early return then kept it until the link dropped. - Invalidate mdix when the link goes down or autonegotiation is disabled, instead of keeping the value read at the last link-up. - Rebased onto net 37f12441f557. The files involved are unchanged. Both issues were raised in the Sashiko review of v3, which Jakub forwarded. v3: https://lore.kernel.org/netdev/20261006160316.1356-1-yongzhao.derek@gmail.com/ v2: https://lore.kernel.org/netdev/20261003173210.1235-1-yongzhao.derek@gmail.com/ v1: https://lore.kernel.org/netdev/20260928220749.857-1-yongzhao.derek@gmail.com/ Testing: the source-extraction model passes 27 checks covering speed and duplex at the phylib notification boundary, latch-low transitions, pause, forced mode, MDIO errors, the idle-error and MSFAIL read order from v3, and the two issues above. v3 fails exactly the four checks for those two issues: an unresolved or reserved status at link-up, and mdix after a link drop or with autonegotiation disabled. An arm64 W=1 build of qca83xx.o, at803x.o and qcom-phy-lib.o is clean. v4 has not been tested on hardware. The hardware result above used v2's at803x_read_status() plus genphy_read_master_slave() on one board, with an Intel igb peer, a two-pair cable and default autonegotiation. Ping changed from 0/20 to 20/20 in each direction at resolved 100 Full. Whether QCA8337 can report link up before the resolved bit is set is unknown. drivers/net/phy/qcom/qca83xx.c | 53 ++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/drivers/net/phy/qcom/qca83xx.c b/drivers/net/phy/qcom/qca83xx.c index bc70ed8efd8..be00bc7cda0 100644 --- a/drivers/net/phy/qcom/qca83xx.c +++ b/drivers/net/phy/qcom/qca83xx.c @@ -92,6 +92,58 @@ static int qca83xx_probe(struct phy_device *phydev) return 0; } +static int qca8337_read_status(struct phy_device *phydev) +{ + struct at803x_ss_mask ss_mask = { + .speed_mask = AT803X_SS_SPEED_MASK, + .speed_shift = __bf_shf(AT803X_SS_SPEED_MASK), + }; + int ret, old_link = phydev->link; + + ret = genphy_read_status(phydev); + if (ret) + return ret; + + /* Keep the state resolved at link-up while the link stays up */ + if (phydev->autoneg == AUTONEG_ENABLE && old_link && phydev->link) + goto out; + + phydev->mdix = ETH_TP_MDI_INVALID; + + /* genphy_read_status() derives speed and duplex from the + * advertisements, which is wrong after a SmartSpeed downshift. + * Use what the PHY resolved instead. + */ + if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete && + phydev->link) { + phydev->speed = SPEED_UNKNOWN; + phydev->duplex = DUPLEX_UNKNOWN; + phydev->pause = false; + phydev->asym_pause = false; + + ret = at803x_read_specific_status(phydev, ss_mask); + if (ret) + return ret; + + /* Report the link down until speed and duplex are resolved, + * so that the next poll reads them again. + */ + if (phydev->speed == SPEED_UNKNOWN || + phydev->duplex == DUPLEX_UNKNOWN) { + phydev->link = 0; + phydev->mdix = ETH_TP_MDI_INVALID; + } else { + phy_resolve_aneg_pause(phydev); + } + } + +out: + /* MDI-X configuration is not implemented */ + phydev->mdix_ctrl = ETH_TP_MDI_INVALID; + + return 0; +} + static int qca83xx_config_init(struct phy_device *phydev) { u8 switch_revision; @@ -220,6 +272,7 @@ static struct phy_driver qca83xx_driver[] = { .flags = PHY_IS_INTERNAL, .config_init = qca83xx_config_init, .soft_reset = genphy_soft_reset, + .read_status = qca8337_read_status, .get_sset_count = qca83xx_get_sset_count, .get_strings = qca83xx_get_strings, .get_stats = qca83xx_get_stats, base-commit: 37f12441f557468a56c1e27790413aa78c82afa2 -- 2.43.0