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Fri, 09 Oct 2026 13:43:34 +0000 (UTC) From: Marc Kleine-Budde To: netdev@vger.kernel.org Cc: davem@davemloft.net, kuba@kernel.org, linux-can@vger.kernel.org, kernel@pengutronix.de, Claudiu Beznea , Biju Das , Geert Uytterhoeven , Marc Kleine-Budde Subject: [PATCH net-next 13/37] can: rcar_canfd: Do not set registers selecting the CAN mode Date: Fri, 9 Oct 2026 15:27:45 +0200 Message-ID: <20261009134323.64064-14-mkl@pengutronix.de> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20261009134323.64064-1-mkl@pengutronix.de> References: <20261009134323.64064-1-mkl@pengutronix.de> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Claudiu Beznea The bits 30 (classical CAN-only mode) and 28 (FD-only enable) of the Channel n CAN-FD Configuration Register of the Renesas RZ/G3S SoC are not available. The IP supports only CAN-FD mode. RZ/G3S HW manual (revision 1.30) specify the bits are read as zero and the write value should always be zero. Add the mode_select_na flag in struct rcar_canfd_hw_info to cover RZ/G3S and avoid writing to unavailable bits. The existing struct rcar_canfd_hw_info instances were updated to address the request in the Link discussion. Commit prepares for the addition of the Renesas RZ/G3S SoC. Link: https://lore.kernel.org/all/1d9719e3-10ff-4cd8-b729-55fea93c37ce@wanadoo.fr Reviewed-by: Biju Das Reviewed-by: Geert Uytterhoeven Signed-off-by: Claudiu Beznea Link: https://patch.msgid.link/20260902141544.565763-5-claudiu.beznea+renesas@tuxon.dev Signed-off-by: Marc Kleine-Budde --- drivers/net/can/rcar/rcar_canfd.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_canfd.c index f9173774387f..ac5d5959d8e4 100644 --- a/drivers/net/can/rcar/rcar_canfd.c +++ b/drivers/net/can/rcar/rcar_canfd.c @@ -445,6 +445,7 @@ struct rcar_canfd_hw_info { unsigned shared_can_regs:1; /* Has shared classical can registers */ unsigned external_clk:1; /* Has external clock */ unsigned fcan_pclk:1; /* Has fcan sourced from pclk. */ + unsigned fixed_canfd:1; /* Has mode fixed to canfd. */ }; /* Channel priv data */ @@ -619,6 +620,7 @@ static const struct rcar_canfd_hw_info rcar_gen3_hw_info = { .shared_can_regs = 0, .external_clk = 1, .fcan_pclk = 0, + .fixed_canfd = 0, }; static const struct rcar_canfd_hw_info rcar_gen4_hw_info = { @@ -637,6 +639,7 @@ static const struct rcar_canfd_hw_info rcar_gen4_hw_info = { .shared_can_regs = 1, .external_clk = 1, .fcan_pclk = 0, + .fixed_canfd = 0, }; static const struct rcar_canfd_hw_info rzg2l_hw_info = { @@ -655,6 +658,7 @@ static const struct rcar_canfd_hw_info rzg2l_hw_info = { .shared_can_regs = 0, .external_clk = 1, .fcan_pclk = 0, + .fixed_canfd = 0, }; static const struct rcar_canfd_hw_info r9a09g047_hw_info = { @@ -673,6 +677,7 @@ static const struct rcar_canfd_hw_info r9a09g047_hw_info = { .shared_can_regs = 1, .external_clk = 0, .fcan_pclk = 0, + .fixed_canfd = 0, }; static const struct rcar_canfd_hw_info r9a09g077_hw_info = { @@ -691,6 +696,7 @@ static const struct rcar_canfd_hw_info r9a09g077_hw_info = { .shared_can_regs = 1, .external_clk = 1, .fcan_pclk = 0, + .fixed_canfd = 0, }; /* Helper functions */ @@ -846,6 +852,9 @@ static int rcar_canfd_reset_controller(struct rcar_canfd_global *gpriv) } /* Set the controller into appropriate mode */ + if (gpriv->info->fixed_canfd) + continue; + if (gpriv->info->ch_interface_mode) { /* Do not set CLOE and FDOE simultaneously */ if (!gpriv->fdmode) { -- 2.53.0