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Fri, 09 Oct 2026 13:43:35 +0000 (UTC) From: Marc Kleine-Budde To: netdev@vger.kernel.org Cc: davem@davemloft.net, kuba@kernel.org, linux-can@vger.kernel.org, kernel@pengutronix.de, Claudiu Beznea , Biju Das , Geert Uytterhoeven , Marc Kleine-Budde Subject: [PATCH net-next 15/37] can: rcar_canfd: Add support for Renesas RZ/G3S Date: Fri, 9 Oct 2026 15:27:47 +0200 Message-ID: <20261009134323.64064-16-mkl@pengutronix.de> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20261009134323.64064-1-mkl@pengutronix.de> References: <20261009134323.64064-1-mkl@pengutronix.de> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Claudiu Beznea Add support for Renesas RZ/G3S The Renesas RZ/G3S CAN-FD controller is largely compatible with the variant found on the Renesas RZ/G3E. The main differences are: - the RZ/G3S provides 16 AFL pages - the RZ/G3S supports only two channels - the RZ/G3S supports only CAN-FD operation and does not implement the bits used to select between classical CAN-only and CAN FD-only modes. - the RZ/G3S includes an internal divider that allows the peripheral clock to be used as the CAN FD clock source. Add support for the Renesas RZ/G3S. Reviewed-by: Biju Das Reviewed-by: Geert Uytterhoeven Signed-off-by: Claudiu Beznea Link: https://patch.msgid.link/20260902141544.565763-6-claudiu.beznea+renesas@tuxon.dev Signed-off-by: Marc Kleine-Budde --- drivers/net/can/rcar/rcar_canfd.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_canfd.c index ac5d5959d8e4..74c3c3f20991 100644 --- a/drivers/net/can/rcar/rcar_canfd.c +++ b/drivers/net/can/rcar/rcar_canfd.c @@ -661,6 +661,26 @@ static const struct rcar_canfd_hw_info rzg2l_hw_info = { .fixed_canfd = 0, }; +static const struct rcar_canfd_hw_info r9a08g045_hw_info = { + .nom_bittiming = &rcar_canfd_gen4_nom_bittiming_const, + .data_bittiming = &rcar_canfd_gen4_data_bittiming_const, + .tdc_const = &rcar_canfd_gen4_tdc_const, + .regs = &rcar_gen4_regs, + .sh = &rcar_gen4_shift_data, + .rnc_field_width = 16, + .max_aflpn = 15, + .max_cftml = 31, + .max_channels = 2, + .postdiv = 2, + .shared_global_irqs = 0, + .multi_channel_irqs = 1, + .ch_interface_mode = 1, + .shared_can_regs = 1, + .external_clk = 1, + .fcan_pclk = 1, + .fixed_canfd = 1, +}; + static const struct rcar_canfd_hw_info r9a09g047_hw_info = { .nom_bittiming = &rcar_canfd_gen4_nom_bittiming_const, .data_bittiming = &rcar_canfd_gen4_data_bittiming_const, @@ -2383,6 +2403,7 @@ static DEFINE_SIMPLE_DEV_PM_OPS(rcar_canfd_pm_ops, rcar_canfd_suspend, static const __maybe_unused struct of_device_id rcar_canfd_of_table[] = { { .compatible = "renesas,r8a779a0-canfd", .data = &rcar_gen4_hw_info }, + { .compatible = "renesas,r9a08g045-canfd", .data = &r9a08g045_hw_info }, { .compatible = "renesas,r9a09g047-canfd", .data = &r9a09g047_hw_info }, { .compatible = "renesas,r9a09g077-canfd", .data = &r9a09g077_hw_info }, { .compatible = "renesas,rcar-gen3-canfd", .data = &rcar_gen3_hw_info }, -- 2.53.0