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Fri, 9 Oct 2026 18:23:26 +0000 From: Ali Rouhi To: "netdev-bot+sashiko@kernel.org" CC: Jiri Pirko , Vadim Fedorenko , Arkadiusz Kubalewski , Ivan Vecera , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Carolina Jubran , Oleg Zadorozhnyi , "devicetree@vger.kernel.org" , "netdev@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH net-next v11 05/13] dpll: sit9531x: read DPLL types and pin properties from system firmware Thread-Topic: [PATCH net-next v11 05/13] dpll: sit9531x: read DPLL types and pin properties from system firmware Thread-Index: AQHdUTSi2pzMpFO4ak+N/kx5A4KK6bbuKg+AgAdqB4A= Date: Fri, 9 Oct 2026 18:23:26 +0000 Message-ID: <20261009182323.76166-3-arouhi@sitime.com> References: <179116259780.434549.13866707323299859257@kernel.org> In-Reply-To: <179116259780.434549.13866707323299859257@kernel.org> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: mx.microsoft.com 1; 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On Mon, 5 Oct 2026, netdev-bot+sashiko@kernel.org wrote:=0A= =0A= Reply inline.=0A= =0A= > [Severity: Medium]=0A= > Do the bindings define an order for supported-frequencies-hz?=0A= >=0A= > The generic binding in dpll-pin.yaml describes it only as "List of=0A= > supported frequencies for this pin, expressed in Hz.". The input-pins=0A= > section of sitime,sit95316.yaml documents the reg numbering, but it says= =0A= > nothing about the first entry being the rate wired to the input. The comm= it=0A= > message doesn't mention this rule either. It only appears in the comment= =0A= > above.=0A= =0A= Right, and the binding is where it belongs.=0A= =0A= The driver takes the first entry because an input has one rate: the one=0A= wired to it. The part qualifies that rate, it does not select among=0A= several, and there is no frequency set on an input.=0A= =0A= > Since this ordering would become de facto DT ABI once boards ship, could = the=0A= > binding document it? Two other options: carry the wired rate in a separat= e=0A= > property, or stop inferring the current rate from its position in the lis= t.=0A= =0A= v12 documents it. The input pins' supported-frequencies-hz now carries=0A= a description stating that the property names the rate wired to the=0A= input, as a single entry.=0A= =0A= A maxItems constraint would have been the stronger form, but dtschema=0A= types every -hz property as a uint32 matrix, so the single /bits/ 64=0A= value of the example reads as two cells to the tooling and maxItems: 1=0A= fails dt_binding_check. The description is what the schema language=0A= allows here.=0A=