Re: [PATCH net-next v12 10/12] dpll: sit9531x: add support to adjust output phase

[Ali Rouhi <arouhi@sitime.com>]

On Tue, 13 Oct 2026, Ivan Vecera wrote:

> > +static int sit9531x_output_phase_encode(u64 fvco, u64 divo, s32 phase_ps,
> > +                                       u64 *coarse_out, u8 *fine_out,
> > +                                       s32 *phase_adj)
> > +{
> > +       u64 abs_ps, cycles, frac_ps, coarse = 0, coarse_ps, t_out_ps;
> > +       s64 phase_norm_ps = 0;
> > +       u8 fine = 0;
> > +
> > +       t_out_ps = mul_u64_u64_div_u64(divo, 1000000000000ULL, fvco);
> > +       if (!t_out_ps)
> > +               return -EINVAL;
> > +
>
> I think you can do this here:
>
> if (!phase_ps) {
> 	*coarse_out = 0;
> 	*fine_out = 0;
> 	*phase_adj = 0;
> 	return 0;
> }
>
> and saves CPU cycles consumed by divisions below.

Done as suggested, right after the period check, with your
Suggested-by on the patch. A zero request has nothing for the fold or
the quantizer to do, and the three outputs are what the rest of the
function would have produced for it anyway.

Thanks,
Ali