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Wed, 14 Oct 2026 15:31:04 -0700 (PDT) Received: from zippy.localdomain ([73.62.185.64]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-91b97bdfb89sm63708466d6.40.2026.10.14.15.31.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Oct 2026 15:31:04 -0700 (PDT) From: Alex Elder To: andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk, davem@davemloft.net, edumazet@kernel.org, kuba@kernel.org, pabeni@redhat.com Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 0/2] net: pcs: xpcs: fix operating mode selection Date: Wed, 14 Oct 2026 17:30:57 -0500 Message-ID: <20261014223100.304486-1-elder@riscstar.com> X-Mailer: git-send-email 2.53.0 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The XPCS found on Toshiba TC9564 is unable to operate at 2500base-X and slower with a PHY connected using SGMII/2500base-X. This XPCS supports 10Gbase-R, which is the default operating mode, and this causes mode selection to fail for slower interfaces (SGMII, 1000baseX, and 2500baseX). Writing a reserved value to the MDIO_CTRL2 register avoids this failure. Wangxun already addresses a similar scenario, but includes custom quirk handling. This series implements handling for slower rates for an XPCS that supports 10Gbase-R. The first patch rearranges code that performs soft reset so that it is done *before* the interface mode is switched. The second adds code to xpcs_switch_interface_mode() to update the MDIO_CTRL2 register for interfaces that support 10Gbase-R so that the desired rate change works as intended. -Alex Daniel Thompson (2): net: pcs: xpcs: re-order xpcs_pre_config() to update after the reset net: pcs: xpcs: select operating mode for 10G-baseR capable PCS drivers/net/pcs/pcs-xpcs.c | 94 +++++++++++++++++++++++++++----------- 1 file changed, 67 insertions(+), 27 deletions(-) base-commit: 05b5019b01fb9443b09ae4ed34af1135a80a84c8 -- 2.53.0