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Miller" , Eric Dumazet , Jakub Kicinski , , Paolo Abeni CC: Arkadiusz Kubalewski , Carolina Jubran , Gal Pressman , Jiri Pirko , Jiri Pirko , Leon Romanovsky , open list , , Mark Bloch , Saeed Mahameed , Tariq Toukan , Vadim Fedorenko Subject: [PATCH net] net/mlx5: DPLL, fix fractional frequency offset scaling Date: Thu, 15 Oct 2026 10:40:35 +0300 Message-ID: <20261015074035.1092340-1-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000C6188:EE_|DS7PR12MB6006:EE_ X-MS-Office365-Filtering-Correlation-Id: 11c714d1-bc34-4fda-9536-08df2a8fac78 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|23010399003|1800799024|7416014|376014|82310400026|56012099006|11063799006|261009223027099003|18002099003|6133799003|10067099003; X-Microsoft-Antispam-Message-Info: 5xtNRBynzHNPpDXh516OmDaU0QiJXyhA+nJQCaM2RUPovtHkHzD0i68knmCiFQmPJmKzYqnTtGsb11oGX6uKN/QpjN5BsKo+ymj/iGq94WV2+dB/082Vav++YvOItQaOMnfw506+XDSTzNjLujnN81/NGtTGQMVwG6iIjlvR0XAaacsXwSrheehL4piO7TQGMVJW/vK039XOx5a7PgHZnOYLcdXj2tbGc8s+gT89iLCG1+Et5wCp/mUD6PrdiPJv0S+9wncvI2jrX39qpKuQrUbDmVAn+X7gVzRocR22CQ8mNbnmXU5u8nG9CmbB+9HYXSv2E+MKsVhkF0zycKMgqw4elF/BRJzoutluGx+5LOvrk6cDH8GMvC1XRZODv8fcjDBMluwCZbICwFTeAyDQytp/fAfESrJ6niZMopSKdtOot2RiCFJkBAWqrzWhUO8Tf6kmSe5oNcQFcQmsFUyg47hhs8ZKiQZTFU07Uf3s9rZxFmj+X+GkQGyzDe/+okA4p3cnjLUq2PclzZWyUImCAAaXT8Cbux1w5kdVxew2pEADPAQeC3BxIRcbOdfV9cdTs+1HSySMoWSmM73D4zVnt6/vnf1PUpSBwR7nIRW8liIOuOeTGkVqUoKGveoItsru2kHB4XppJ14CSg+OKkXttEhvFNtehSr1ryesyYslIO/4MoLWMCvbgrRIJphlnRBAUJPGA4Z8QA7x6+ALZgcyTA== X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700016)(23010399003)(1800799024)(7416014)(376014)(82310400026)(56012099006)(11063799006)(261009223027099003)(18002099003)(6133799003)(10067099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: iuzxEQbCXa+0H3TMCI6QEJCZhA0gAqLc6xT4CfCwxHiuUmfpo7h6hfKbGppDZZLsiaOjLPfGVZ1iammnDqVCVU/Uume9MJpx/7Uw8wBZrlWPtK3fsXrjZKXNFUx3U+66Doh0NTC12ahgxsugNSlz5gXDi8wfdWBkdpdoQYPLcPOOmuZq7xgK0WpnzLkNJ7Umgpz0kvonpypfqytWxS1Zba1jFbBdnCEJZczQhg8dSsOVcv5i9pHtBxy2PCOt/FvcVoeUzMcih/BPGav6BRAjDE+Q7BvYgzt08j3qZqTQZgPhzc/2jjvzITkHtYn+xxX40hWaRkc0CaOpGaCCnLkydnOj1GlYhQEV4LHDLkpBAoWJZn3/HQTF9yisQD/OK+ZGFkLrqY2PLd3DPkvJxGuqL1aDyBqTaWVf6Zm+uou45BQFfdmMSUgPA59VJYGoRWNb X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Oct 2026 07:41:07.1002 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 11c714d1-bc34-4fda-9536-08df2a8fac78 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000C6188.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6006 From: Carolina Jubran The frequency_diff is reported by firmware in parts-per-trillion, which is exactly what the DPLL core now expects from the ffo_get callback. Commit bc443c253fcd ("dpll: expose fractional frequency offset in ppt") switched the callback contract to ppt but assumed frequency_diff was in ppm and scaled it by 1000000 to "convert" it. Since the value was already ppt, this makes both exported attributes wrong. Report frequency_diff as is and let the core divide it down for the legacy ppm attribute. Fixes: f035dca34ede ("net/mlx5: DPLL, Implement fractional frequency offset get pin op") Signed-off-by: Carolina Jubran Reviewed-by: Jiri Pirko Signed-off-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/dpll.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/dpll.c b/drivers/net/ethernet/mellanox/mlx5/core/dpll.c index 7c69d9029bfa..54ba7c330d66 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/dpll.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/dpll.c @@ -138,7 +138,7 @@ mlx5_dpll_pin_ffo_get(struct mlx5_dpll_synce_status *synce_status, { if (!synce_status->oper_freq_measure) return -ENODATA; - *ffo = 1000000LL * synce_status->frequency_diff; + *ffo = synce_status->frequency_diff; return 0; } base-commit: af32da41b0327b9c6a37856ba82b6760d6c8d10e -- 2.44.0