From: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
To: Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Paolo Abeni <pabeni@redhat.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Richard Cochran <richardcochran@gmail.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Biao Huang <biao.huang@mediatek.com>,
Maxime Chevallier <maxime.chevallier@bootlin.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Eric Dumazet <edumazet@kernel.org>,
Eric Dumazet <edumazet@kernel.org>
Cc: kernel@collabora.com, netdev@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
linux-stm32@st-md-mailman.stormreply.com,
Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
Subject: [PATCH net-next v3 2/9] dt-bindings: net: mediatek-dwmac: add support for MT8189 SoC
Date: Fri, 16 Oct 2026 12:31:06 +0200 [thread overview]
Message-ID: <20261016-dwmac-mediatek-mt8189-v3-2-25daf2bbcf35@collabora.com> (raw)
In-Reply-To: <20261016-dwmac-mediatek-mt8189-v3-0-25daf2bbcf35@collabora.com>
Add new compatible string and clock definitions for the Ethernet MAC
IP found in MT8189 SoC.
Regarding the required clocks, the MT8189 datasheets list in the
paragraph related to this IP clocks the mac main and ptp reference
clocks as the ones to turn on.
No specific peripheral clock for Ethernet MAC is described in the SoC
clock list. But at the same time, the Ethernet MAC block diagram,
present in the datasheets, shows this IP is interconnected to the rest
of SoC with AXI and APB interfaces (and in MT8188 datasheet too).
There is no APB related clock, that is specific to the IP in MT8189,
contrary to MT8188 or MT8195 that have one. But since it is on an APB
bus (likely shared between multiple IPs), then there is a bus clock for
peripheral access. Describing the IP having it makes sense, same thing
for AXI too, so the clock lists for this compatible are reflecting
that.
Also, don't allow mediatek,rmii-clk-from-mac property for MT8189
compatible.
Finally, update "mediatek,rx-delay-ps" and "mediatek,tx-delay-ps" property
description to add MT8189 RX/TX delay stage divider values, as they
differ from existing supported SoC.
Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
---
.../devicetree/bindings/net/mediatek-dwmac.yaml | 54 ++++++++++++++++++----
1 file changed, 45 insertions(+), 9 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml b/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml
index 14f9683f20fe..6acfe104ef09 100644
--- a/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml
@@ -20,13 +20,11 @@ select:
enum:
- mediatek,mt2712-gmac
- mediatek,mt8188-gmac
+ - mediatek,mt8189-gmac
- mediatek,mt8195-gmac
required:
- compatible
-allOf:
- - $ref: snps,dwmac.yaml#
-
properties:
compatible:
oneOf:
@@ -36,6 +34,7 @@ properties:
- const: snps,dwmac-4.20a
- items:
- enum:
+ - mediatek,mt8189-gmac
- mediatek,mt8195-gmac
- const: snps,dwmac-5.10a
- items:
@@ -45,7 +44,7 @@ properties:
- const: snps,dwmac-5.10a
clocks:
- minItems: 5
+ minItems: 4
items:
- description: AXI clock
- description: APB clock
@@ -55,7 +54,7 @@ properties:
- description: MAC clock gate
clock-names:
- minItems: 5
+ minItems: 4
items:
- const: axi
- const: apb
@@ -86,8 +85,10 @@ properties:
or will round down. Range 0~31*170.
For MT2712 RMII/MII interface, Allowed value need to be a multiple of 550,
or will round down. Range 0~31*550.
- For MT8188/MT8195 RGMII/RMII/MII interface, Allowed value need to be a multiple of 290,
- or will round down. Range 0~31*290.
+ For MT8188/MT8195 RGMII/RMII/MII interface, Allowed value need to be a
+ multiple of 290, or will round down. Range 0~31*290.
+ For MT8189 RGMII/RMII/MII interface, Allowed value need to
+ be a multiple of 180, or will round down. Range 0~31*180.
mediatek,rx-delay-ps:
description:
@@ -96,8 +97,10 @@ properties:
or will round down. Range 0~31*170.
For MT2712 RMII/MII interface, Allowed value need to be a multiple of 550,
or will round down. Range 0~31*550.
- For MT8188/MT8195 RGMII/RMII/MII interface, Allowed value need to be a multiple
- of 290, or will round down. Range 0~31*290.
+ For MT8188/MT8195 RGMII/RMII/MII interface, Allowed value need to be a
+ multiple of 290, or will round down. Range 0~31*290.
+ For MT8189 RGMII/RMII/MII interface, Allowed value need to
+ be a multiple of 180, or will round down. Range 0~31*180.
mediatek,rmii-rxc:
type: boolean
@@ -147,6 +150,39 @@ required:
- phy-mode
- mediatek,pericfg
+allOf:
+ - $ref: snps,dwmac.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - mediatek,mt2712-gmac
+ - mediatek,mt8188-gmac
+ - mediatek,mt8195-gmac
+ then:
+ properties:
+ clocks:
+ minItems: 5
+
+ clock-names:
+ minItems: 5
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - mediatek,mt8189-gmac
+ then:
+ properties:
+ clocks:
+ maxItems: 4
+ clock-names:
+ maxItems: 4
+
+ mediatek,rmii-clk-from-mac: false
+
unevaluatedProperties: false
examples:
--
2.56.0
next prev parent reply other threads:[~2026-10-16 10:32 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-16 10:31 [PATCH net-next v3 0/9] net/stmmac: Add Mediatek MT8189 support Louis-Alexis Eyraud
2026-10-16 10:31 ` [PATCH net-next v3 1/9] dt-bindings: net: mediatek-dwmac: fix unit in rx/tx delay property description Louis-Alexis Eyraud
2026-10-16 15:33 ` Andrew Lunn
2026-10-16 10:31 ` Louis-Alexis Eyraud [this message]
2026-10-16 15:40 ` [PATCH net-next v3 2/9] dt-bindings: net: mediatek-dwmac: add support for MT8189 SoC Andrew Lunn
2026-10-16 10:31 ` [PATCH net-next v3 3/9] net: stmmac: mediatek: simplify TX/RX delay handling in mt8195_set_delay Louis-Alexis Eyraud
2026-10-16 10:31 ` [PATCH net-next v3 4/9] net: stmmac: mediatek: simplify TX/RX delay handling in mt2712_set_delay Louis-Alexis Eyraud
2026-10-16 10:31 ` [PATCH net-next v3 5/9] net: stmmac: mediatek: add RX/TX delay stage divider in platform data Louis-Alexis Eyraud
2026-10-16 11:37 ` Maxime Chevallier
2026-10-16 10:31 ` [PATCH net-next v3 6/9] net: stmmac: mediatek: add PERI_ETH_CTRLx register offset " Louis-Alexis Eyraud
2026-10-16 10:31 ` [PATCH net-next v3 7/9] net: stmmac: mediatek: use TX clock phase shift in RGMII mode with 1Gbps speed Louis-Alexis Eyraud
2026-10-16 11:41 ` Maxime Chevallier
2026-10-16 15:48 ` Andrew Lunn
2026-10-16 10:31 ` [PATCH net-next v3 8/9] net: stmmac: mediatek: add support for TX clock output enable feature Louis-Alexis Eyraud
2026-10-16 10:31 ` [PATCH net-next v3 9/9] net: stmmac: mediatek: add support for MT8189 SoC Louis-Alexis Eyraud
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20261016-dwmac-mediatek-mt8189-v3-2-25daf2bbcf35@collabora.com \
--to=louisalexis.eyraud@collabora.com \
--cc=alexandre.torgue@foss.st.com \
--cc=andrew+netdev@lunn.ch \
--cc=angelogioacchino.delregno@collabora.com \
--cc=biao.huang@mediatek.com \
--cc=conor+dt@kernel.org \
--cc=davem@davemloft.net \
--cc=devicetree@vger.kernel.org \
--cc=edumazet@kernel.org \
--cc=kernel@collabora.com \
--cc=krzk+dt@kernel.org \
--cc=kuba@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=linux-stm32@st-md-mailman.stormreply.com \
--cc=matthias.bgg@gmail.com \
--cc=maxime.chevallier@bootlin.com \
--cc=mcoquelin.stm32@gmail.com \
--cc=netdev@vger.kernel.org \
--cc=pabeni@redhat.com \
--cc=richardcochran@gmail.com \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox