From: Stanislaw Pal <kuncy7@gmail.com>
To: Christian Marangi <ansuelsmth@gmail.com>,
Andrew Lunn <andrew@lunn.ch>, Vladimir Oltean <olteanv@gmail.com>
Cc: "David S . Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@kernel.org>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH net-next v2 1/2] net: dsa: qca8k: serialize register access
Date: Mon, 19 Oct 2026 21:11:36 +0200 [thread overview]
Message-ID: <20261019191137.307514-2-kuncy7@gmail.com> (raw)
In-Reply-To: <20261019191137.307514-1-kuncy7@gmail.com>
The regmap is created with .disable_locking, on the ground that
qca8k's read and write callbacks do their own locking. They only lock
the bus transaction, though: regmap formats the register and parses
the value in the map's shared work_buf, outside of them, so two
concurrent users can swap or corrupt each other's register and value.
Most register access runs under rtnl, but not all of it - phylink's
resolve work (mac_link_up/down) and the LED class callbacks do not -
and the next change adds a delayed work that reads the MIB. Let regmap
take its own lock; every user sleeps already, on the MDIO bus or on
the management frame round trip.
An autocast MIB read holds the MIB mutex while its register write
takes the management mutex, and qca8k_conduit_change() takes the two
the other way round. Both run under rtnl today; with a reader outside
rtnl that would be an ABBA deadlock. Take the MIB mutex first there
too.
Assisted-by: Claude:claude-opus-5-5
Signed-off-by: Stanislaw Pal <kuncy7@gmail.com>
---
drivers/net/dsa/qca/qca8k-8xxx.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/net/dsa/qca/qca8k-8xxx.c b/drivers/net/dsa/qca/qca8k-8xxx.c
index 07227ae8b..9a8b9e34a 100644
--- a/drivers/net/dsa/qca/qca8k-8xxx.c
+++ b/drivers/net/dsa/qca/qca8k-8xxx.c
@@ -579,7 +579,6 @@ static const struct regmap_config qca8k_regmap_config = {
.write = qca8k_bulk_write,
.reg_update_bits = qca8k_regmap_update_bits,
.rd_table = &qca8k_readable_table,
- .disable_locking = true, /* Locking is handled by qca8k read/write */
.cache_type = REGCACHE_NONE, /* Explicitly disable CACHE */
.max_raw_read = 32, /* mgmt eth can read up to 8 registers at time */
/* ATU regs suffer from a bug where some data are not correctly
@@ -1782,13 +1781,16 @@ qca8k_conduit_change(struct dsa_switch *ds, const struct net_device *conduit,
if (dp->index != 0)
return;
- mutex_lock(&priv->mgmt_eth_data.mutex);
+ /* Same order as an autocast, which holds the MIB mutex while its
+ * register write takes the management one.
+ */
mutex_lock(&priv->mib_eth_data.mutex);
+ mutex_lock(&priv->mgmt_eth_data.mutex);
priv->mgmt_conduit = operational ? (struct net_device *)conduit : NULL;
- mutex_unlock(&priv->mib_eth_data.mutex);
mutex_unlock(&priv->mgmt_eth_data.mutex);
+ mutex_unlock(&priv->mib_eth_data.mutex);
}
static int qca8k_connect_tag_protocol(struct dsa_switch *ds,
--
2.43.0
next prev parent reply other threads:[~2026-10-19 19:12 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-19 19:11 [PATCH net-next v2 0/2] net: dsa: qca8k: report port statistics from the MIB Stanislaw Pal
2026-10-19 19:11 ` Stanislaw Pal [this message]
2026-10-19 19:11 ` [PATCH net-next v2 2/2] " Stanislaw Pal
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