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[82.69.66.36]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4ac0b4df257sm164791725e9.4.2026.11.02.06.58.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Nov 2026 06:58:18 -0800 (PST) Date: Mon, 2 Nov 2026 14:58:16 +0000 From: David Laight To: saeed bishara Cc: Demian Shulhan , Catalin Marinas , Will Deacon , Mark Rutland , Eric Biggers , Andrew Morton , Marco Elver , Ard Biesheuvel , Robin Murphy , David Gow , Brendan Higgins , Nathan Chancellor , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kunit-dev@googlegroups.com, netdev@vger.kernel.org, llvm@lists.linux.dev Subject: Re: [PATCH 0/2] arm64: csum: Add fused copy and Internet checksum Message-ID: <20261102145816.00a06c47@pumpkin> In-Reply-To: References: <20260927131838.6774-1-demyansh@gmail.com> <20260927184414.6c0c8867@pumpkin> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; arm-unknown-linux-gnueabihf) X-Mailing-List: netdev@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On Mon, 2 Nov 2026 13:44:37 +0200 saeed bishara wrote: > On Sun, Nov 1, 2026 at 3:34=E2=80=AFPM Demian Shulhan wrote: > > > > I would prefer to keep only the scalar version of the fused copy+csum. > > It reads the data once instead of twice, and on real Armv9 hardware it > > cuts end-to-end cycles/byte for bulk TCP over WireGuard by 3-12% > > depending on the core (+6-8% throughput). It uses only general-purpose > > registers, so there is no FPSIMD state to save and it is safe in any > > context. > > > > If you are OK with the scalar path, I can send v2 with NEON dropped, > > the scalar path only, and the KUnit fix for the x86 zero-length case > > Jakub reported. > > =20 > The scalar path seems like generic C code and not restricted to arm64, > curious how that performs against existing (e.g. x86) assembly The x86 asm version manages to do more than one 'add with carry' every clock. That needs the massive out-of-order execution unit and the ability to have multiple independent 'flags' registers live at the same time. The generic C do_csum() (I just looked at lib/checksum.c) is horrid There are three dependent alu operations per iteration. It is likely that the pipelineable: u64 sum64_a(unsigned char *buf, unsigned long count) { u64 val, sum =3D 0, carry =3D 0; buf +=3D count; count =3D -count; do { val =3D *(u64 *)(buf + count); sum +=3D val; carry +=3D sum < val; } while ((count +=3D 8)); sum +=3D carry; sum +=3D sum < carry; return sum; } or: u64 sum64_b(unsigned char *buf, unsigned long count) { u64 val, sum =3D 0, carry =3D 0; unsigned char *end =3D buf + count; do { val =3D *(u64 *)(buf); sum +=3D val; carry +=3D sum < val; } while ((buf +=3D 8) !=3D end); sum +=3D carry; sum +=3D sum < carry; return sum; } will generate 'pretty good' code https://godbolt.org/z/K9ob6d8vv. The first needs 'reg+reg' addressing, the second better for mips-like cpu that have 'compare and branch' rather than a flags register. gcc and clang seem to make a reasonable job of compiling those (provided buf isn't u64 *). Today it left the 'negative offset from end' loop alone, but it has a nasty habit of pessimising it. For x86-64 gcc is generating: .L4: addq (%rdi,%rdx), %rax adcq $0, %rcx addq $8, %rdx jne .L4 I think a zen5 would execute that at one iteration per clock. Intel cpu can only execute two clock loops - so it needs unrolling once. If you unroll it once (with separate sum/carry variables) there is a moderate chance of it running faster than 'one word per clock' (two words/clock is probably wishful thinking, zen5 can do 6 add/clock but some timings I've done imply that memory addressing can use and alu add). For slower cpu (especially in-order ones with memory read delays) you may need interleave the code, eg giving the loop: val0 =3D *(u64 *)buf; do { val1 =3D *(u64 *)(buf + 8); sum0 +=3D val0; carry0 +=3D sum0 < val0; val0 =3D *(u64 *)(buf + 16); sum1 +=3D val1; carry1 +=3D sum1 < val1; } while ((buf +=3D 16) !=3D end); I didn't try those loops when I was timing the cksum code a few years back. They have the big advantage of a small loop stride. David > optimized implementation. > saeed