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[82.69.66.36]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4abf0b36853sm267629925e9.0.2026.11.02.08.14.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Nov 2026 08:14:28 -0800 (PST) Date: Mon, 2 Nov 2026 16:14:26 +0000 From: David Laight To: Demian Shulhan Cc: saeed bishara , Catalin Marinas , Will Deacon , Mark Rutland , Eric Biggers , Andrew Morton , Marco Elver , Ard Biesheuvel , Robin Murphy , David Gow , Brendan Higgins , Nathan Chancellor , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kunit-dev@googlegroups.com, netdev@vger.kernel.org, llvm@lists.linux.dev Subject: Re: [PATCH 0/2] arm64: csum: Add fused copy and Internet checksum Message-ID: <20261102161426.2403d308@pumpkin> In-Reply-To: References: <20260927131838.6774-1-demyansh@gmail.com> <20260927184414.6c0c8867@pumpkin> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; arm-unknown-linux-gnueabihf) X-Mailing-List: netdev@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On Mon, 2 Nov 2026 16:14:06 +0100 Demian Shulhan wrote: > > The scalar path seems like generic C code and not restricted to arm64, > > curious how that performs against existing (e.g. x86) assembly > > optimized implementation. =20 > Depends. I think __builtin_addcll() is needed to get roughly the same > performance as the asm version. In my tests GCC on arm64 turns it > into adds + cset instead of adcs like on x86. > But I will look at it, thanks! The C version I posted earlier has the loop: buf +=3D count; count =3D -count; sum =3D carry =3D 0; do { val =3D *(u64 *)(buf + count); sum +=3D val; carry +=3D sum < val; } while ((count +=3D 8)); for aarch64 you get: .L4: ldr x1, [x0, x4] adds x2, x2, x1 cinc x3, x3, cs # adc $0,%rxx on x86 adds x4, x4, 8 bne .L4 I suspect that is close to optimal - especially for fast cpu with out of order execution. https://godbolt.org/z/eso79K7Wq David >=20 > =D0=BF=D0=BD, 2 =D0=BB=D0=B8=D1=81=D1=82. 2026=E2=80=AF=D1=80. =D0=BE 12:= 44 saeed bishara =D0=BF=D0=B8=D1=88=D0=B5: > > > > On Sun, Nov 1, 2026 at 3:34=E2=80=AFPM Demian Shulhan wrote: =20 > > > > > > I would prefer to keep only the scalar version of the fused copy+csum. > > > It reads the data once instead of twice, and on real Armv9 hardware it > > > cuts end-to-end cycles/byte for bulk TCP over WireGuard by 3-12% > > > depending on the core (+6-8% throughput). It uses only general-purpose > > > registers, so there is no FPSIMD state to save and it is safe in any > > > context. > > > > > > If you are OK with the scalar path, I can send v2 with NEON dropped, > > > the scalar path only, and the KUnit fix for the x86 zero-length case > > > Jakub reported. > > > =20 > > The scalar path seems like generic C code and not restricted to arm64, > > curious how that performs against existing (e.g. x86) assembly > > optimized implementation. > > saeed =20