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[9.244.8.156]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-5498cb5b520sm12746021cf.26.2026.11.02.17.33.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Nov 2026 17:33:21 -0800 (PST) From: Enzo Adriano To: junhui.liu@pigmoral.tech Cc: Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Philipp Zabel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Richard Cochran , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, netdev@vger.kernel.org, Jerome Brunet , Andre Przywara , Norman Herms , Vinicius Pedrosa Subject: Re: [PATCH v6 3/8] clk: sunxi-ng: a733: Add PRCM CCU Date: Mon, 2 Nov 2026 20:33:19 -0500 Message-ID: <20261103-a733-ccu-v6-fw-clocks@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20261009-a733-clk-v6-3-ae8178fce7e8@pigmoral.tech> References: <20261009-a733-clk-v6-0-ae8178fce7e8@pigmoral.tech> <20261009-a733-clk-v6-3-ae8178fce7e8@pigmoral.tech> X-Mailing-List: netdev@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Hi Junhui, On Fri, Oct 09, 2026 at 11:52:08PM +0800, Junhui Liu wrote: > +static SUNXI_CCU_P_DATA_WITH_MUX_GATE(r_cpu_timer0, "r-timer0", r_apb_parents, 0x100, > + 1, 3, /* P */ > + 4, 3, /* mux */ > + BIT(0), /* gate */ > + 0); On a Cubie A7S with vendor boot firmware, v6 reaches a Linux shell but stalls at warm reboot. The system-controller firmware uses the R-domain timer and mailboxes without Linux clock consumers, so disabling these clocks as unused can leave its services unavailable. Could you consider marking r-timer0, bus-r-timer, bus-r-riscv and bus-r-msgbox here, and bus-msgbox0 in 7/8, CLK_IS_CRITICAL in the next revision? My standalone patch has the diff, firmware references and board results: https://lore.kernel.org/r/20261031020640-263f7b05-a7s-clock@gmail.com With those five flags, two RAM boots of my A7S integration completed warm reboots without clk_ignore_unused, and all five clocks reported enabled. That is one board on vendor firmware. Vinicius reported native PSCI reboot working on an A7Z without local critical flags on bus-r-riscv and bus-r-msgbox, with TF-A and U-Boot built from source, so the boot chain may matter. I haven't tested suspend, or shown that each of the five flags is needed on its own. Thanks, Enzo