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Sat, 07 Nov 2026 04:17:12 -0800 (PST) Received: from d.home.yangfl.dn42 ([2a09:bac1:76a0:28::1d2:30]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ed47d5f35asm12773555ad.49.2026.11.07.04.17.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Nov 2026 04:17:12 -0800 (PST) From: David Yang To: netdev@vger.kernel.org Cc: David Yang , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , linux-kernel@vger.kernel.org Subject: [PATCH net-next v4 1/8] net: dsa: motorcomm: Fix VLAN SVL and learn limit definitions Date: Sat, 7 Nov 2026 20:16:22 +0800 Message-ID: <20261107121631.1040612-2-mmyangfl@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20261107121631.1040612-1-mmyangfl@gmail.com> References: <20261107121631.1040612-1-mmyangfl@gmail.com> X-Mailing-List: netdev@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Bit 3 of the VLAN table control enables shared VLAN learning (IVL/SVL), it has nothing to do with S-VLAN tagging, so name it SVL_EN rather than SVLAN_EN. Widen PORT_LEARN_LIMIT_M to the 13 bits up to LEARN_DROP_ON_EXCEEDED at bit 2. Nothing uses it, so this is a no-op. Signed-off-by: David Yang --- drivers/net/dsa/motorcomm/chip.c | 4 +--- drivers/net/dsa/motorcomm/chip.h | 4 ++-- 2 files changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/net/dsa/motorcomm/chip.c b/drivers/net/dsa/motorcomm/chip.c index 33e5fc127244..693564aeaec1 100644 --- a/drivers/net/dsa/motorcomm/chip.c +++ b/drivers/net/dsa/motorcomm/chip.c @@ -922,9 +922,7 @@ yt921x_vlan_aware_set(struct yt921x_priv *priv, int port, bool vlan_aware) { u32 ctrl; - /* Abuse SVLAN for PCP parsing without polluting the FDB - it just works - * despite YT921X_VLAN_CTRL_SVLAN_EN never being set - */ + /* Abuse SVLAN for PCP parsing without polluting the FDB */ if (!vlan_aware) ctrl = YT921X_PORT_IGR_TPIDn_STAG(0); else diff --git a/drivers/net/dsa/motorcomm/chip.h b/drivers/net/dsa/motorcomm/chip.h index fc315f1d8f87..d9425afc7bce 100644 --- a/drivers/net/dsa/motorcomm/chip.h +++ b/drivers/net/dsa/motorcomm/chip.h @@ -240,7 +240,7 @@ enum yt921x_app_selector { #define YT921X_PORT_LEARN_SUSPEND_DROP_EN BIT(18) #define YT921X_PORT_LEARN_DIS BIT(17) #define YT921X_PORT_LEARN_LIMIT_EN BIT(16) -#define YT921X_PORT_LEARN_LIMIT_M GENMASK(15, 8) +#define YT921X_PORT_LEARN_LIMIT_M GENMASK(15, 3) #define YT921X_PORT_LEARN_LIMIT(x) FIELD_PREP(YT921X_PORT_LEARN_LIMIT_M, (x)) #define YT921X_PORT_LEARN_DROP_ON_EXCEEDED BIT(2) #define YT921X_PORT_LEARN_MODE_M GENMASK(1, 0) @@ -357,7 +357,7 @@ enum yt921x_app_selector { #define YT921X_VLAN_CTRLb_UNTAG_PORTn(port) BIT((port) + 8) #define YT921X_VLAN_CTRLb_STP_ID_M GENMASK(7, 4) #define YT921X_VLAN_CTRLb_STP_ID(x) FIELD_PREP(YT921X_VLAN_CTRLb_STP_ID_M, (x)) -#define YT921X_VLAN_CTRLb_SVLAN_EN BIT(3) +#define YT921X_VLAN_CTRLb_SVL_EN BIT(3) #define YT921X_VLAN_CTRLab_FID_M GENMASK_ULL(34, 23) #define YT921X_VLAN_CTRLab_FID(x) FIELD_PREP(YT921X_VLAN_CTRLab_FID_M, (x)) #define YT921X_VLAN_CTRLa_LEARN_DIS BIT(22) -- 2.53.0