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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org Subject: [PATCH net-next v3 09/14] dpll: dpllsim: Add support to set frequency on pins Date: Mon, 9 Nov 2026 10:35:18 +0100 Message-ID: <20261109093523.931201-10-poros@redhat.com> In-Reply-To: <20261109093523.931201-1-poros@redhat.com> References: <20261109093523.931201-1-poros@redhat.com> X-Mailing-List: netdev@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 Add support to set the frequency of input and output pins. The DPLL core validates the requested value against the supported frequency list the pin advertises, so the frequency_set callback only has to store it. The same per type tables that validate the configured frequency at live time serve as the supported list. The configfs attribute is rejected with EBUSY while the device is live, so only the netlink setter changes the frequency of a registered pin and the two cannot race. Reviewed-by: Ivan Vecera Acked-by: Jiri Pirko Signed-off-by: Petr Oros --- drivers/dpll/dpllsim/dpll.c | 15 +++++++++++++++ drivers/dpll/dpllsim/dpllsim.h | 4 ++-- 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/dpll/dpllsim/dpll.c b/drivers/dpll/dpllsim/dpll.c index 5e360596097616..8590d2db808e45 100644 --- a/drivers/dpll/dpllsim/dpll.c +++ b/drivers/dpll/dpllsim/dpll.c @@ -79,6 +79,19 @@ static int dpllsim_pin_frequency_get(const struct dpll_pin *pin, return 0; } +static int dpllsim_pin_frequency_set(const struct dpll_pin *pin, + void *pin_priv, + const struct dpll_device *dpll, + void *dpll_priv, u64 frequency, + struct netlink_ext_ack *extack) +{ + struct dpllsim_pin *sim_pin = pin_priv; + + guard(mutex)(&sim_pin->dev->lock); + sim_pin->frequency = frequency; + return 0; +} + static int dpllsim_pin_direction_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, @@ -171,6 +184,7 @@ static int dpllsim_pin_prio_set(const struct dpll_pin *pin, void *pin_priv, static const struct dpll_pin_ops dpllsim_input_pin_ops = { .frequency_get = dpllsim_pin_frequency_get, + .frequency_set = dpllsim_pin_frequency_set, .direction_get = dpllsim_pin_direction_get, .state_on_dpll_get = dpllsim_pin_state_get, .state_on_dpll_set = dpllsim_pin_state_set, @@ -180,6 +194,7 @@ static const struct dpll_pin_ops dpllsim_input_pin_ops = { static const struct dpll_pin_ops dpllsim_output_pin_ops = { .frequency_get = dpllsim_pin_frequency_get, + .frequency_set = dpllsim_pin_frequency_set, .direction_get = dpllsim_pin_direction_get, .state_on_dpll_get = dpllsim_pin_state_get, }; diff --git a/drivers/dpll/dpllsim/dpllsim.h b/drivers/dpll/dpllsim/dpllsim.h index f9fced337dc881..f59447d26a8668 100644 --- a/drivers/dpll/dpllsim/dpllsim.h +++ b/drivers/dpll/dpllsim/dpllsim.h @@ -26,8 +26,8 @@ struct dpllsim_pin { /* * Configuration, set through configfs only until - * dpllsim_dev_frozen(). The netlink prio setter changes prio at - * runtime under dev->lock. + * dpllsim_dev_frozen(). The netlink setters change prio and + * frequency at runtime under dev->lock. */ enum dpll_pin_type type; enum dpll_pin_direction direction; -- 2.56.0