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[144.49.247.28]) by smtp-relay.gmail.com with ESMTPS id 98e67ed59e1d1-3b181fa190fsm876348a91.2.2026.11.11.04.36.32 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 11 Nov 2026 04:36:32 -0800 (PST) X-Relaying-Domain: broadcom.com X-CFilter-Loop: Reflected Received: by mail-dy1-f200.google.com with SMTP id 5a478bee46e88-36f479b9819so5370952eec.1 for ; Wed, 11 Nov 2026 04:36:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1794400591; x=1795005391; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=dJebYUd8pyS8Z+2CVSNXS7zJ6v/TxgKHnB9NFofUJ3w=; b=VyTd/9jrML9zcs9uomduEh9xZgo5saMDng/+eErzdlEQVSOXXyxVFf51DuOFbJOT9D DhZDTx42zUhesPVNKaL8GypaUo9HOnx1y8ujBjjN3tvrNYd4t4ykrGz1mKHsvOudkjxz cOcrCdnj9aPcnGx0QVMwbWG9ugRUJya2p1Rxw= X-Forwarded-Encrypted: i=1; AL+hErE5mIb9VOjICekWK72x0F4XqEhdf9asg1/bnNIzqTlN7QdIyWkcNL/I2cbo88I/zDOBSohnc3Y=@vger.kernel.org X-Received: by 2002:a05:7300:c7c1:b0:36e:b05e:9a74 with SMTP id 5a478bee46e88-37686a49cd9mr2558403eec.30.1794400590962; Wed, 11 Nov 2026 04:36:30 -0800 (PST) X-Received: by 2002:a05:7300:c7c1:b0:36e:b05e:9a74 with SMTP id 5a478bee46e88-37686a49cd9mr2558373eec.30.1794400590107; Wed, 11 Nov 2026 04:36:30 -0800 (PST) Received: from pc-hpe-top-git-sendmail-server.dhcp.broadcom.net ([192.19.234.250]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-375218c863csm15159947eec.28.2026.11.11.04.36.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Nov 2026 04:36:29 -0800 (PST) From: Pavan Chebbi To: michael.chan@broadcom.com, kuba@kernel.org Cc: andrew+netdev@lunn.ch, andrew.gospodarek@broadcom.com, davem@davemloft.net, edumazet@kernel.org, netdev@vger.kernel.org, pabeni@redhat.com, Pavan Chebbi , Rui Salvaterra Subject: [PATCH net v2 1/4] tg3: Don't fail probe if 31-bit coherent DMA mask is unsupported Date: Wed, 11 Nov 2026 18:09:13 +0530 Message-ID: <20261111123917.910416-2-pavan.chebbi@broadcom.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20261111123917.910416-1-pavan.chebbi@broadcom.com> References: <20261111123917.910416-1-pavan.chebbi@broadcom.com> X-Mailing-List: netdev@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-DetectorID-Processed: b00c1d49-9d2e-4205-b15f-d015386d3d5e Commit 614f4d166eee ("tg3: Set coherent DMA mask bits to 31 for BCM57766 chipsets") lowered the coherent DMA mask to 31 bits as a workaround for a spurious address overflow error in the hardware. The result of dma_set_coherent_mask() is fatal to probe, so on platforms that cannot satisfy such a mask the device fails to probe: tg3 0000:01:00.0: Unable to obtain 64 bit DMA for consistent allocations tg3 0000:01:00.0: probe with driver tg3 failed with error -5 This was reported on a Mac mini (Macmini6,2, BCM57766) running a kernel built without CONFIG_ZONE_DMA and with IOMMU passthrough as the default. Without CONFIG_ZONE_DMA, dma_direct_supported() only accepts a mask narrower than 32 bits if it covers the highest physical memory address, so with direct mapping a 31-bit coherent mask is rejected whenever memory extends above 2GB. Treat the 31-bit mask as best effort. If it is refused, warn and fall back to the mask used before 614f4d166eee, so that the device still probes. Platforms that accept the mask are unaffected. Where it is refused, 614f4d166eee never protected the device, it only stopped it from probing, so this restores the behaviour of kernels before that commit. Warn when a status block lands at an address matching the pattern described in 614f4d166eee, so that a resulting TX timeout can be identified. Fixes: 614f4d166eee ("tg3: Set coherent DMA mask bits to 31 for BCM57766 chipsets") Reported-by: Rui Salvaterra Link: https://lore.kernel.org/netdev/CALjTZvYKHWrD5m+RXimjxODvpFPw7Cq_EOEuzRi1PZT9_JxF+g@mail.gmail.com/ Signed-off-by: Pavan Chebbi --- drivers/net/ethernet/broadcom/tg3.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c index 95827df4cf6a..2cf9d2ea069b 100644 --- a/drivers/net/ethernet/broadcom/tg3.c +++ b/drivers/net/ethernet/broadcom/tg3.c @@ -8867,6 +8867,13 @@ static int tg3_alloc_consistent(struct tg3 *tp) if (!tnapi->hw_status) goto err_out; + if (tg3_asic_rev(tp) == ASIC_REV_57766 && + (lower_32_bits(tnapi->status_mapping) & 0xffff0000) == + 0xffff0000) + dev_warn(&tp->pdev->dev, + "Status block at DMA address %pad may cause TX timeouts on this device\n", + &tnapi->status_mapping); + sblk = tnapi->hw_status; if (tg3_flag(tp, ENABLE_RSS)) { @@ -17756,6 +17763,7 @@ static int tg3_init_one(struct pci_dev *pdev, u64 dma_mask, persist_dma_mask; netdev_features_t features = 0; u8 addr[ETH_ALEN] __aligned(2); + u64 test_dma_mask = 0; err = pci_enable_device(pdev); if (err) { @@ -17895,15 +17903,22 @@ static int tg3_init_one(struct pci_dev *pdev, persist_dma_mask = dma_mask = DMA_BIT_MASK(64); if (tg3_asic_rev(tp) == ASIC_REV_57766) - persist_dma_mask = DMA_BIT_MASK(31); + test_dma_mask = DMA_BIT_MASK(31); /* Configure DMA attributes. */ if (dma_mask > DMA_BIT_MASK(32)) { err = dma_set_mask(&pdev->dev, dma_mask); if (!err) { features |= NETIF_F_HIGHDMA; - err = dma_set_coherent_mask(&pdev->dev, - persist_dma_mask); + if (!test_dma_mask || + dma_set_coherent_mask(&pdev->dev, + test_dma_mask)) { + if (test_dma_mask) + dev_warn(&pdev->dev, + "Unable to set 31 bit coherent DMA mask, workaround not applied\n"); + err = dma_set_coherent_mask(&pdev->dev, + persist_dma_mask); + } if (err < 0) { dev_err(&pdev->dev, "Unable to obtain 64 bit " "DMA for consistent allocations\n"); -- 2.52.0