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Thu, 12 Nov 2026 02:32:41 -0800 (PST) X-Received: by 2002:a05:6000:1861:b0:48b:1296:52ec with SMTP id ffacd0b85a97d-499c68d2bf7mr10244096f8f.18.1794479561175; Thu, 12 Nov 2026 02:32:41 -0800 (PST) Received: from redhat.com ([2a0d:6fc0:1511:2900:ff37:b35c:a97:952d]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4983600bd6esm16325613f8f.28.2026.11.12.02.32.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Nov 2026 02:32:40 -0800 (PST) Date: Thu, 12 Nov 2026 05:32:37 -0500 From: "Michael S. Tsirkin" To: zhaoguohan@kylinos.cn Cc: jasowangio@gmail.com, eperezma@redhat.com, xuanzhuo@linux.alibaba.com, kvm@vger.kernel.org, virtualization@lists.linux.dev, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/2] vhost: set dirty log bits without pinning pages on x86 Message-ID: <20261112051259-mutt-send-email-mst@kernel.org> References: <20261112085631.128819-1-zhaoguohan@kylinos.cn> <20261112085631.128819-2-zhaoguohan@kylinos.cn> <20261112045853-mutt-send-email-mst@kernel.org> X-Mailing-List: netdev@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20261112045853-mutt-send-email-mst@kernel.org> On Thu, Nov 12, 2026 at 05:10:10AM -0500, Michael S. Tsirkin wrote: > On Thu, Nov 12, 2026 at 04:56:30PM +0800, zhaoguohan@kylinos.cn wrote: > > From: Khan Zhao > > > > set_bit_to_user() pins the log page with pin_user_pages_fast(), maps it > > with kmap_atomic(), sets one bit and then unpins the page and marks it > > dirty. This runs for every bit set in the dirty log, e.g. on each used > > ring update while logging is enabled for live migration. > > > > log_write() always passes a byte address and a bit number in [0, 7], so > > the update can be done as a byte-sized cmpxchg on the user address. On > > x86, try that first using unsafe_try_cmpxchg_user() inside a > > user_access_begin()/user_access_end() section with page faults disabled. > > If the access faults (page not present, read-only or needing COW), or > > the cmpxchg loses to concurrent updates of the same byte four times in > > a row, fall back to the existing pin/kmap/set_bit path, which can fault > > the page in. > > > > unsafe_try_cmpxchg_user() is only implemented on x86, so other > > architectures keep using the existing path. > > > > On an x86_64 KVM guest (i7-12800HX host), a synthetic used-ring > > workload with logging enabled went from 243.60 to 171.11 ns per > > descriptor, averaged over five alternating runs. This is the > > end-to-end cost per descriptor, not live migration performance. > > > > Signed-off-by: Khan Zhao > > --- > > drivers/vhost/vhost.c | 50 ++++++++++++++++++++++++++++++++++++++----- > > 1 file changed, 45 insertions(+), 5 deletions(-) > > > > diff --git a/drivers/vhost/vhost.c b/drivers/vhost/vhost.c > > index e29f154706da..9c3045504709 100644 > > --- a/drivers/vhost/vhost.c > > +++ b/drivers/vhost/vhost.c > > @@ -2527,11 +2527,7 @@ long vhost_dev_ioctl(struct vhost_dev *d, unsigned int ioctl, void __user *argp) > > } > > EXPORT_SYMBOL_GPL(vhost_dev_ioctl); > > > > -/* TODO: This is really inefficient. We need something like get_user() > > - * (instruction directly accesses the data, with an exception table entry > > - * returning -EFAULT). See Documentation/arch/x86/exception-tables.rst. > > - */ > > -static int set_bit_to_user(int nr, void __user *addr) > > +static int set_bit_to_user_slow(int nr, void __user *addr) > > { > > unsigned long log = (unsigned long)addr; > > struct page *page; > > @@ -2550,6 +2546,50 @@ static int set_bit_to_user(int nr, void __user *addr) > > return 0; > > } > > > > +#ifdef CONFIG_X86 > > Wait this is x86 specific anyway? So let's just implement it > properly, why do we need all these hacks? > > I run a quick test on this in a VM, feel free to reuse: > > Signed-off-by: Michael S. Tsirkin > sorry fat fingers. wrong file. this one seems to work. Signed-off-by: Michael S. Tsirkin diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h index 3a0dd3c2b233e..ba1e7c3f83c8e 100644 --- a/arch/x86/include/asm/uaccess.h +++ b/arch/x86/include/asm/uaccess.h @@ -594,6 +594,24 @@ _label: \ __ret; \ }) +/* set_bit() on a byte of user memory; returns -EFAULT on fault. */ +#define set_bit_user(nr, addr) \ +({ \ + int __err = 0; \ + __uaccess_begin(); \ + asm volatile("\n" \ + "1: " LOCK_PREFIX "orb %[mask], %[ptr]\n" \ + "2:\n" \ + _ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_EFAULT_REG, \ + %[errout]) \ + : [errout] "=r" (__err), \ + [ptr] "+m" (*(u8 __user *)(addr)) \ + : [mask] "q" ((unsigned char)BIT(nr)) \ + : "memory", "cc"); \ + __uaccess_end(); \ + __err ? -EFAULT : 0; \ +}) + /* * We want the unsafe accessors to always be inlined and use * the error labels - thus the macro games.