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From: Arun Iyengar via B4 Relay <devnull+aiyengar1990.gmail.com@kernel.org>
To: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	Heiko Stuebner <heiko@sntech.de>
Cc: Andrew Lunn <andrew+netdev@lunn.ch>,
	 "David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@kernel.org>,
	 Jakub Kicinski <kuba@kernel.org>,
	Paolo Abeni <pabeni@redhat.com>,
	 David Wu <david.wu@rock-chips.com>,
	Damien Le Moal <dlemoal@kernel.org>,
	 Niklas Cassel <cassel@kernel.org>,
	Serge Semin <fancer.lancer@gmail.com>,
	 netdev@vger.kernel.org, devicetree@vger.kernel.org,
	 linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org,
	 linux-kernel@vger.kernel.org, linux-ide@vger.kernel.org,
	 Pranjal Shrivastava <praan@google.com>,
	Will Deacon <will@kernel.org>,
	 Robin Murphy <robin.murphy@arm.com>,
	iommu@lists.linux.dev,  Shawn Lin <shawn.lin@rock-chips.com>,
	 Sebastian Reichel <sebastian.reichel@collabora.com>,
	 Arun Iyengar <aiyengar1990@gmail.com>
Subject: [PATCH 5/9] arm64: dts: rockchip: Add the PHP GRF clock on RK3588
Date: Fri, 13 Nov 2026 16:38:51 +0000	[thread overview]
Message-ID: <20261113-mmu600-php-v1-5-231196049a3b@gmail.com> (raw)
In-Reply-To: <20261113-mmu600-php-v1-0-231196049a3b@gmail.com>

From: Arun Iyengar <aiyengar1990@gmail.com>

Once the PHP peripherals suspend, pclk_php_root is gated and a PHP GRF
access hangs; the syscore resume op of the next patch hung deep suspend
this way. Add the clock, so the syscon regmap enables it.

Signed-off-by: Arun Iyengar <aiyengar1990@gmail.com>
---
 arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
index d0f364547ae5..8807ce6193bf 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
@@ -619,6 +619,7 @@ usb_grf: syscon@fd5ac000 {
 	php_grf: syscon@fd5b0000 {
 		compatible = "rockchip,rk3588-php-grf", "syscon";
 		reg = <0x0 0xfd5b0000 0x0 0x1000>;
+		clocks = <&cru PCLK_PHP_ROOT>;
 	};
 
 	csidphy0_grf: syscon@fd5b4000 {

-- 
2.55.0



  parent reply	other threads:[~2026-11-13 16:38 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-13 16:38 [PATCH 0/9] RK3588: Enable the PHP SMMU Arun Iyengar via B4 Relay
2026-11-13 16:38 ` [PATCH 1/9] dt-bindings: net: rockchip-dwmac: Allow iommus Arun Iyengar via B4 Relay
2026-11-13 16:38 ` [PATCH 2/9] dt-bindings: ata: rockchip,dwc-ahci: " Arun Iyengar via B4 Relay
2026-11-13 16:38 ` [PATCH 3/9] dt-bindings: soc: rockchip: grf: Allow a clock for the RK3588 PHP GRF Arun Iyengar via B4 Relay
2026-11-13 16:38 ` [PATCH 4/9] soc: rockchip: grf: Assign the StreamIDs of the RK3588 PHP SMMU masters Arun Iyengar via B4 Relay
2026-11-13 16:38 ` Arun Iyengar via B4 Relay [this message]
2026-11-13 16:38 ` [PATCH 6/9] soc: rockchip: grf: Restore the RK3588 PHP StreamIDs after system suspend Arun Iyengar via B4 Relay
2026-11-13 16:38 ` [PATCH 7/9] arm64: dts: rockchip: Add the clock and reset of the RK3588 PHP SMMU Arun Iyengar via B4 Relay
2026-11-13 16:38 ` [PATCH 8/9] arm64: dts: rockchip: Attach the masters " Arun Iyengar via B4 Relay
2026-11-13 16:38 ` [PATCH 9/9] arm64: dts: rockchip: Enable " Arun Iyengar via B4 Relay

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